GDM Display Wiring With High-Resistance Contacts for ESD Protection
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Solution Overview
Problem
Display devices using the gate driver monolithic (GDM) technique are prone to electro-static discharge (ESD) in the peripheral region, leading to potential damage of the gate driver circuit and reduced manufacturing yield.
Innovation Solution
The display device incorporates a specific design with higher electrical resistance between branch wiring lines and trunk lines, utilizing multiple contact holes and conductive portions in different layers to minimize ESD effects, including transparent conductive materials and strategic placement of conductive layers to enhance ESD protection.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If the gate driver circuit is integrally formed on the TFT substrate using GDM technique, then the frame can be narrowed and manufacturing cost reduced, but the device becomes more susceptible to ESD damage in the peripheral region
Solution Approach 1:
The patent applies local quality by making the contact holes between trunk wiring lines and branch wiring lines have different electrical resistance characteristics in different regions. Specifically, contact holes in the peripheral region have higher electrical resistance to block ESD propagation, while contact holes in the display region maintain lower resistance for normal signal transmission. This localized differentiation protects the gate driver circuit from ESD damage while preserving normal functionality.
Solution Approach 2:
The patent changes the electrical resistance parameter of contact holes based on their location. By controlling the size, shape, or material composition of contact holes in the peripheral region, the electrical resistance is increased compared to contact holes in the display region. This parameter change enables the system to simultaneously achieve narrow frame width and ESD protection by optimizing the resistance characteristic according to the functional requirements of different regions.
2Reliability
If ESD protection measures are added to protect the gate driver circuit, then the reliability improves, but the device complexity and manufacturing process become more complicated
Solution Approach 1:
The patent merges the ESD protection function with the existing wiring structure by utilizing the same trunk wiring lines and branch wiring lines that are already part of the GDM design. Instead of adding separate protection circuits or structures, the patent integrates ESD protection into the contact holes that connect these wiring lines. This merging approach provides ESD protection while minimizing additional device complexity and manufacturing steps.
3Reliability
If the electrical resistance between trunk line and branch wiring line is increased to block ESD, then the ESD protection improves, but the signal transmission quality may deteriorate
Solution Approach 1:
The patent segments the wiring system into different regions with different electrical resistance characteristics. The peripheral region, where ESD protection is critical, has contact holes with higher resistance to block ESD propagation. The display region, where signal transmission quality is paramount, has contact holes with lower resistance for optimal signal transmission. This segmentation allows each region to be optimized for its specific function without compromising the other.
Solution Approach 2:
The patent applies local quality by differentiating the electrical resistance of contact holes based on their location. Contact holes in the peripheral region have higher resistance for ESD protection, while contact holes in the display region have lower resistance for high-quality signal transmission. This localized optimization ensures that signal transmission quality is maintained in the display region while providing ESD protection in the peripheral region.
Data Source
AI summary
A display device includes a first trunk line extending in a column direction and included in a first conductive layer, a first branch wiring line connected to the first trunk line and included in a second conductive layer, a first contact hole through which a first portion of the first trunk line is exposed, and a third contact hole through a third portion of a conductive portion included in the first conductive layer is exposed, wherein, in the row direction, a range of the third portion overlaps a range of the first trunk line, in the column direction, a range of the third portion overlaps a range of the first trunk line, and an electric resistance value between the third portion and the first branch wiring line is higher than an electric resistance value between the first portion of the first trunk line and the first branch wiring line.