Ge Contact Layer Integration for CMOS Contact Resistivity

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Solution Overview

Problem

Multi-gate metal-oxide-semiconductor field-effect transistors (MOSFETs), such as CMOS devices, face challenges in manufacturability due to their 3D designs and small sizes, particularly with epitaxial layers of silicon germanium (SiGe) being sensitive to oxidation and etching chemistries, which can lead to removal during subsequent process steps.

Innovation Solution

A method involving cavity shaping, selective deposition, and metallic liner processes to form a contact layer on silicon germanium surfaces, protected by a cap layer to prevent oxidation and contamination, using a multi-chamber processing system to maintain a controlled environment.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If an epitaxial layer of silicon germanium with high germanium concentration is formed to minimize contact resistance, then contact resistivity is reduced into the 10^-9 Ω·cm2 regime, but the epitaxial layer becomes sensitive to oxidation and wet etching chemistries, causing it to be removed in subsequent process steps

Engineering Contradiction:
Improvecontact resistivityVSAvoidepitaxial layer stability
Core Design Contradiction:
ReliabilityVSStability of the object's composition

Solution Approach 1:

A metallic liner layer is deposited between the silicon germanium epitaxial layer and the subsequent processing environment. This liner acts as an intermediary barrier that prevents direct exposure of the Ge-rich epitaxial layer to oxidizing and etching chemistries, thereby protecting it from removal while maintaining its low contact resistance properties

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The metallic liner creates an inert protective environment around the sensitive epitaxial layer. By forming a physical barrier that is chemically inert to oxidation and wet etching processes, the liner effectively isolates the Ge-rich silicon germanium from harmful chemical environments in subsequent processing steps

Inventive Principle:
Principle #39Inert atmosphere (Inert environment)

2Stability of the object's composition

If a metallic liner is deposited to protect the epitaxial layer from oxidation and etching, then the epitaxial layer is protected, but additional process steps and materials are required

Engineering Contradiction:
Improveepitaxial layer protectionVSAvoidprocess complexity
Core Design Contradiction:
Stability of the object's compositionVSDevice complexity

Solution Approach 1:

The metallic liner serves multiple functions simultaneously: it acts as a protective barrier against oxidation and etching, provides a diffusion barrier, and serves as an adhesion layer for subsequent metal contacts. This multi-functionality reduces the need for additional separate layers and process steps, offsetting the added complexity with consolidated functionality

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The method effectively forms a contact layer on silicon germanium surfaces, protecting them from oxidation and etching, enhancing the manufacturability and performance of CMOS devices by minimizing contact resistance.

Implementation Method 1

performing a metallic liner deposition process to form a metallic liner on inner surfaces of the first opening and the second opening

Methodology Applied
Scientific EffectPhysical Vapour Deposition: Physical Vapour Deposition

Implementation Method 2

performing a metallic liner deposition process to form a metallic liner on inner surfaces of the first opening and the second opening

Methodology Applied
Scientific EffectChemical Vapour Deposition: Chemical Vapour Deposition

Implementation Method 3

performing a first selective deposition process to form a contact layer on an exposed surface of the first cavity and on an exposed surface of the second cavity

Methodology Applied
Scientific EffectEpitaxy: Epitaxy

Data Source

PatentUS20250301763A1Ge contact layer integration for CMOS devices
Publication Date: 2025.09.25 APPLIED MATERIALS INC
  • US20250301763A1 patent drawing
  • US20250301763A1 patent drawing
  • US20250301763A1 patent drawing

AI summary

A method of forming an electrical contact in a semiconductor structure includes forming a first cavity at an exposed surface of a p-MOS region within a first opening formed in a dielectric layer and a second cavity at an exposed surface of an n-MOS region within a second opening formed in the dielectric layer, forming a contact layer on an exposed surface of the first cavity and on an exposed surface of the second cavity, forming a metallic liner on inner surfaces of the first opening and the second opening, and over the dielectric layer, removing the metallic liner and the contact layer over the n-MOS region, and forming a cap layer on the inner surfaces of the first opening and the second opening.