Genetic Algorithm Multi-Stage Routing for Analog Circuit Nets
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing electronic circuit design systems face challenges in automatically routing all nets at the graphical user interface to meet electrical performance and speed requirements, particularly in analog and mix-signal layouts.
Innovation Solution
A computer-implemented method and system that applies a genetic algorithm with a multi-stage routing analysis, including device-level global routing, intra-row routing, inter-row routing, and post-routing optimization, to optimize net routing and display the results at a graphical user interface, using a cost function that considers track placement penalties and guided mutation operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If manual routing is performed at the graphical user interface, then routing can be customized to meet specific electrical performance requirements, but the process is time-consuming and difficult to automate for all nets
Solution Approach 1:
The system implements self-service routing by automatically performing routing operations without requiring manual user input at the graphical interface. The genetic algorithm autonomously optimizes net routing by evaluating multiple design parameters and generating optimized routes, eliminating the need for time-consuming manual routing while maintaining high precision results
Solution Approach 2:
The patent replaces the mechanical manual routing process with an automated computational system. Instead of manual drag-and-drop or point-to-point routing operations, the system uses a genetic algorithm that computationally evaluates numerous routing possibilities and automatically generates optimized routes based on electrical performance requirements and design constraints
2Productivity
If automated routing algorithms are applied to all nets, then routing time is reduced, but it is difficult to meet electrical performance and speed requirements
Solution Approach 1:
The system implements feedback mechanisms by continuously evaluating routing solutions against electrical performance requirements. The genetic algorithm uses fitness functions that assess routing quality based on speed, signal integrity, and design rule compliance, iteratively improving solutions until performance targets are met. This feedback loop ensures automated routing maintains high electrical performance while achieving full automation
Solution Approach 2:
The patent employs dynamic optimization by allowing the routing algorithm to adapt and evolve solutions during the routing process. The genetic algorithm dynamically adjusts routing paths, via placements, and track assignments based on real-time evaluation of electrical performance metrics, enabling the system to meet stringent reliability requirements while maintaining high automation levels
3Manufacturing precision
If complex multi-parameter optimization is performed, then routing quality is improved, but the computational complexity and processing time increase
Solution Approach 1:
The system segments the complex routing optimization problem into manageable components using a multi-stage genetic algorithm approach. The algorithm divides the routing process into distinct phases (global routing, detailed routing, optimization), each handling specific aspects of the problem. This segmentation reduces computational complexity by breaking down the overwhelming task of optimizing all parameters simultaneously into sequential, more tractable sub-problems while maintaining high routing quality
Data Source
AI summary
The present disclosure relates to a computer-implemented method for electronic design is provided. Embodiments may include receiving, using at least one processor, an electronic design having one or more unoptimized nets. Embodiments may further include applying a genetic algorithm to the electronic design, wherein the genetic algorithm includes a multi-stage routing analysis. A first stage analysis may apply a device-level global routing analysis, a second stage analysis may include an intra-row routing analysis, a third stage may include an inter-row routing analysis, and a fourth stage may include a post-routing optimization analysis. Embodiments may also include generating an optimized routing of the one or more unoptimized nets and displaying the optimized routing at a graphical user interface.


