Germanium-Rich Channel Transistors With Dopant Diffusion Barriers
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Solution Overview
Problem
In semiconductor devices, particularly Ge-rich channel transistors, there is a strong driving force for dopant diffusion from source/drain regions into the channel region, leading to short channel effects, higher off-state current, and low threshold gate voltage, which degrades transistor performance and can render devices inoperable due to high diffusion rates of n-type dopants like phosphorous or arsenic.
Innovation Solution
Incorporating dopant diffusion barrier elements such as tin and high silicon content into the source/drain regions to inhibit dopant diffusion into the Ge-rich channel region, either as an interfacial layer or alloyed throughout the S/D material, effectively preventing unwanted dopant diffusion.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If dopant is used in source/drain regions to enhance conductivity, then on-state current is improved, but dopant diffusion into the channel region causes short channel effects and degrades transistor performance
Solution Approach 1:
A dopant diffusion barrier layer is introduced as an intermediary between the source/drain regions and the channel region. This barrier layer selectively blocks dopant diffusion into the channel while permitting charge carrier transport, thus maintaining high on-state current without the harmful short channel effects caused by dopant contamination.
Solution Approach 2:
The source/drain regions are engineered with spatially varying properties: heavily doped adjacent to the channel for high conductivity, but with a dopant diffusion barrier layer or compositional gradient to prevent dopant migration into the channel. This local differentiation allows simultaneous achievement of high on-state current and suppressed short channel effects.
2Power
If dopant diffusion is allowed to enhance source/drain conductivity, then on-state current increases, but effective channel length decreases leading to short channel effects
Solution Approach 1:
The dopant diffusion barrier layer acts as a physical intermediary that maintains the effective channel length by preventing dopant-induced shortening, while still allowing the source/drain regions to be heavily doped for high on-state current.
Solution Approach 2:
The source/drain structure is segmented into distinct zones: a heavily doped region for conductivity, a barrier layer for dopant confinement, and an interface region with controlled properties. This segmentation allows independent optimization of conductivity and channel length maintenance.
3Speed
If n-type dopant is used in source/drain regions to improve electron transport, then device speed increases, but diffusion rate becomes excessively high rendering devices inoperable
Solution Approach 1:
The dopant diffusion barrier layer serves as a mediator that enables the use of high concentrations of n-type dopant in the source/drain regions for fast electron transport, while preventing the excessive diffusion that would otherwise render devices inoperable.
Solution Approach 2:
The source/drain structure employs composite materials including the dopant diffusion barrier layer with specific compositional properties that provide both dopant blocking capability and compatibility with high-speed n-type operation, achieving a balance between speed and manufacturability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach significantly reduces dopant diffusion, increasing the effective channel length and improving short channel effects, enhancing on-state current and transistor performance, especially in sub-50 nm gate length devices, by curbing dopant diffusivity by up to 5 orders of magnitude.
Implementation Method 1
there is a strong driving force for dopant diffusion from source/drain regions into the channel region
Data Source
AI summary
Techniques are disclosed for forming germanium (Ge)-rich channel transistors including one or more dopant diffusion barrier elements. The introduction of one or more dopant diffusion elements into at least a portion of a given source/drain (S/D) region helps inhibit the undesired diffusion of dopant (e.g., B, P, or As) into the adjacent Ge-rich channel region. In some embodiments, the elements that may be included in a given S/D region to help prevent the undesired dopant diffusion include at least one of tin and relatively high silicon. Further, in some such embodiments, carbon may also be included to help prevent the undesired dopant diffusion. In some embodiments, the one or more dopant diffusion barrier elements may be included in an interfacial layer between a given S/D region and the Ge-rich channel region and/or throughout at least a majority of a given S/D region. Numerous embodiments, configurations, and variations will be apparent.


