Germanium Fin Transistors With Selective Epitaxy on Silicon
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Solution Overview
Problem
The integration of Germanium (Ge) with silicon substrates for forming transistors faces challenges due to lattice mismatch defects, leading to high defect densities and difficulties in forming small Ge islands mixed with Si for use in a single circuit.
Innovation Solution
The method involves selective growth of Ge on Si to form fin bodies of transistors, eliminating the need for buffer layers and allowing for the growth of thicker Ge films without nucleation of extended defects, thereby forming crystalline Ge fins only in the local regions required for transistors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If thick buffer layers of intermediate SiGe composition are used to accommodate lattice mismatch defects, then heteroepitaxy of germanium on silicon can be achieved, but it becomes difficult to form small Ge islands mixed with Si for use in a single circuit and the defect density remains relatively high
Solution Approach 1:
The patent divides the continuous buffer layer into discrete, localized Ge islands formed only in specific regions where transistors are needed. This segmentation allows Ge to be grown in isolated islands rather than as a continuous thick buffer layer, enabling both low defect density and the ability to form small Ge islands mixed with Si for use in a single circuit.
Solution Approach 2:
The patent applies local quality by growing Ge only in specific local regions where transistor fins are required, rather than uniformly across the entire substrate. This localized growth approach allows different regions to have different properties: regions with Ge islands for high-performance transistors and regions without Ge for standard Si devices, thereby reducing overall defect density while enabling selective formation of small Ge islands.
2Reliability
If conventional heteroepitaxy methods are used with thick buffer layers, then Ge can be integrated with Si substrate, but the mechanical compliance and stress in the grown layers increase
Solution Approach 1:
The patent extracts the Ge material from the thick continuous buffer layer structure and forms it only as discrete islands in localized regions. This extraction eliminates the need for thick buffer layers that cause mechanical stress, while still providing the beneficial Ge integration where needed. The thin, localized Ge islands have improved mechanical compliance compared to thick continuous buffers.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces defect densities and allows for the stable growth of thicker Ge films, enhancing the performance of transistors by improving mechanical compliance and reducing stress in the grown layers.
Implementation Method 1
The method involves selective growth of Ge on Si to form fin bodies of transistors, eliminating the need for buffer layers and allowing for the growth of thicker Ge films without nucleation of extended defects
Data Source
AI summary
Methods are disclosed for forming fins in transistors. In one embodiment, a method of fabricating a device includes forming silicon fins on a substrate and forming a dielectric layer on the substrate and adjacent to the silicon fins such that an upper region of each silicon fin is exposed. Germanium may then be epitaxially grown germanium on the upper regions of the silicon fins to form germanium fins.