Germanium-on-Insulator Fabrication via Inter-diffusion
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Solution Overview
Problem
Conventional methods for manufacturing Germanium-on-Insulator (GeOI) semiconductor devices face challenges such as crystal quality damage during dopant implantation, low activation yield, difficulty in achieving high doping concentrations, and technical difficulties in scaling down the germanium layer thickness, as well as limitations in manufacturing N-type MOSFETs and complementary devices with different channel materials.
Innovation Solution
The method involves forming a sacrificial layer on a substrate with dopant atoms and a germanium layer, where dopant atoms diffuse during growth and annealing, allowing for inter-diffusion to control dopant concentrations and polarity without lattice mismatch, using capping layers to manage dopant escape and supply, and bonding the germanium layer to an insulating layer for wafer splitting, enabling high-quality N-type and P-type GeOI devices with reduced crystal damage and low contact resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If dopant implantation is used to manufacture GeOI, then doping concentration can be achieved, but germanium crystal quality is damaged and activation yield is low
Solution Approach 1:
A sacrificial layer is introduced as an intermediary between the substrate and the germanium layer. This sacrificial layer mediates the dopant transfer process, allowing dopants to diffuse into the germanium layer through the sacrificial layer during growth and annealing, thereby avoiding direct implantation damage to the germanium crystal while achieving the desired doping concentration
Solution Approach 2:
The mechanical dopant implantation process is replaced with a thermal diffusion process. Instead of physically implanting dopants into the germanium layer (which causes crystal damage), dopants are introduced through thermal diffusion during the growth and annealing of the germanium layer on the sacrificial layer, achieving doping without mechanical damage
2Adaptability or versatility
If conventional GeOI manufacturing methods are used, then P-MOSFET can be manufactured, but N-MOSFET with high doping concentration cannot be achieved
Solution Approach 1:
The doping concentration parameter is controlled by adjusting the annealing temperature and duration. By optimizing these thermal parameters, the diffusion of dopants from the substrate through the sacrificial layer into the germanium layer can be precisely controlled, achieving high doping concentrations (≥1×10^19 cm^-3) necessary for N-MOSFET operation
3Length of moving object
If the germanium layer thickness is reduced to a few tens of nm, then device scaling is improved, but the process becomes too technically difficult
Solution Approach 1:
The germanium layer thickness is controlled by self-limiting mechanisms during the growth process. The growth conditions and time are optimized so that the germanium layer naturally forms at the desired thickness (a few tens of nm) without requiring complex post-growth thinning processes, making the manufacturing process more feasible
4Reliability
If different channel materials are used for N-MOSFET and P-MOSFET, then device performance can be optimized, but process cost increases
Solution Approach 1:
The germanium-based platform with the sacrificial layer structure serves as a universal solution for manufacturing both N-MOSFET and P-MOSFET. By adjusting the dopant type and concentration through the same sacrificial layer mechanism, both device types can be manufactured using the same process flow, reducing process complexity and cost while maintaining optimized performance
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach results in high-quality germanium layers with reduced crystal damage, enabling the production of GeOI devices with high doping concentrations, low contact resistance, and the ability to manufacture both N-type and P-type MOSFETs using the same channel material, overcoming the limitations of conventional methods.
Implementation Method 1
germanium (Ge) layer includes first dopant atoms diffused from the first substrate by growth temperature in the forming step
Implementation Method 2
thermal treatment during or after growth of germanium (Ge)
Data Source
AI summary
A method for manufacturing a semiconductor device according to embodiments may include forming a sacrificial layer on a first substrate including first dopant atoms and second dopant atoms, and forming a germanium (Ge) layer on the sacrificial layer. Here, the germanium (Ge) layer may include the first dopant atoms diffused from the first substrate by growth temperature in the forming step. Additionally, the method for manufacturing a semiconductor device may further include annealing after growth of the germanium (Ge) layer so that the germanium (Ge) layer may include second dopant atoms.