Germanium Active Layer Parasitic Leakage Barrier

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Solution Overview

Problem

Conventional semiconductor devices with germanium active layers face significant parasitic leakage issues due to conductive silicon germanium buffer layers, which hinder the fabrication of low leakage devices and degrade transistor performance.

Innovation Solution

Integration of a parasitic leakage barrier layer with a higher band-gap semiconductor material between the buffer layers and the germanium active layer, blocking leakage pathways without disrupting the lattice constant or causing defects, thereby improving the alignment and reducing unwanted capacitance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If silicon germanium buffer layers are used to grow germanium active layers, then lattice mismatch is reduced and device fabrication is enabled, but parasitic leakage currents increase and transistor performance degrades

Engineering Contradiction:
Improvelattice matchingVSAvoidparasitic leakage
Core Design Contradiction:
Manufacturing precisionVSObject-generated harmful factors

Solution Approach 1:

The buffer layer structure is segmented into multiple layers with different germanium compositions (e.g., Si0.7Ge0.3, Si0.5Ge0.5, Si0.3Ge0.7) arranged in sequence between the substrate and the germanium active layer. This segmentation allows each layer to provide a gradual transition in lattice constant, reducing misfit dislocations while the specific composition arrangement creates a barrier to parasitic leakage pathways.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The invention uses composite buffer layer structures combining silicon and germanium in varying ratios to create a multi-functional layer system. The composite structure provides both lattice matching functionality (through gradual composition change) and parasitic leakage suppression (through strategic placement of lower-germanium-content layers that act as leakage barriers).

Inventive Principle:
Principle #40Composite materials

2Ease of manufacture

If conventional buffer layers are used, then device fabrication is simplified, but alignment between gate electrode and source/drain extensions deteriorates and unwanted capacitance increases

Engineering Contradiction:
Improvefabrication simplicityVSAvoidalignment precision
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The invention changes the germanium composition parameter across different buffer layers (e.g., from Si0.7Ge0.3 to Si0.5Ge0.5 to Si0.3Ge0.7) to achieve both lattice matching and improved alignment. By controlling the thickness and composition of each layer, the vertical position of the germanium active layer can be precisely controlled, ensuring proper alignment with gate electrode and source/drain extensions.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The parasitic leakage barrier effectively suppresses leakage currents, enhancing the performance of germanium-based semiconductor devices by blocking leakage paths and maintaining the lattice grading from the substrate to the active region, thus improving the off-state leakage and overall transistor performance.

Implementation Method 1

a parasitic leakage barrier layer with a higher band-gap semiconductor material than the buffer layers

Methodology Applied
Scientific EffectBand-gap:

Data Source

PatentEP2901490B1Semiconductor device having germanium active layer with underlying parasitic leakage barrier layer
Publication Date: 2022.06.15 INTEL CORP
  • EP2901490B1 patent drawingFigure 1~2
  • EP2901490B1 patent drawingFigure 3
  • EP2901490B1 patent drawingFigure 4

AI summary

Semiconductor devices having germanium active layers with underlying parasitic leakage barrier layers are described. For example, a semiconductor device includes a first buffer layer disposed above a substrate. A parasitic leakage barrier is disposed above the first buffer layer. A second buffer layer is disposed above the parasitic leakage barrier. A germanium active layer is disposed above the second buffer layer. A gate electrode stack is disposed above the germanium active layer. Source and drain regions are disposed above the parasitic leakage barrier, on either side of the gate electrode stack.