Germanium NDR Diode for Compact SRAM Integration
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Solution Overview
Problem
Current negative differential resistance (NDR) diodes have a low peak to valley current ratio, making them unsuitable for large-scale SRAM applications, and are difficult to integrate into memory cells due to manufacturing complexities and high costs associated with thin alternating layers of compound semiconductor materials.
Innovation Solution
A p-type germanium region in contact with an n-type germanium region forms a germanium pn junction diode, with gate electrodes configured to apply specific electrical potentials, allowing for the creation of compact, reliable NDR diodes that can be easily integrated into memory cells, utilizing a monocrystalline germanium layer over an insulator, and an MOS transistor with source, gate, and drain regions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If thin alternating layers of compound semiconductor materials are deposited by molecular beam epitaxy to create NDR diodes, then negative differential resistance is achieved, but manufacturing complexity and cost increase significantly
Solution Approach 1:
The patent changes the material parameter from compound semiconductor layers to germanium-based materials, and changes the deposition method parameter from molecular beam epitaxy to more conventional semiconductor fabrication processes. This maintains the NDR effect while dramatically simplifying manufacturing
Solution Approach 2:
The invention replaces expensive, complex-to-manufacture compound semiconductor NDR diodes with a simpler germanium-based structure that uses more economical fabrication processes, making the technology economically viable for large-scale production
2Productivity
If the six transistor SRAM cell size is reduced by shrinking design rules, then memory storage capacity increases, but manufacturing difficulty increases and reliability decreases
Solution Approach 1:
The patent changes the fundamental device structure parameter from six transistors to one transistor plus two NDR diodes. This structural parameter change enables smaller cell size and higher density without the reliability penalties associated with further shrinking of conventional six-transistor cells
3Device complexity
If available NDR diodes with peak to valley current ratio of ten or less are used, then device simplicity is maintained, but the current ratio is insufficient for large scale SRAM applications
Solution Approach 1:
The patent changes the material composition parameter to germanium-based materials and optimizes the doping concentrations and layer structures, achieving a peak to valley current ratio exceeding 100,000:1. This parameter optimization enables the NDR diodes to meet the stringent requirements for large-scale SRAM applications while maintaining structural simplicity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution provides NDR diodes with a peak to valley current ratio of more than five orders of magnitude, enabling stable and low-power memory cells with a small footprint, suitable for high-density memory integration and reduced manufacturing difficulties.
Implementation Method 1
a p-type germanium region in contact with an n-type germanium region and forming a germanium pn junction diode
Implementation Method 2
A first gate electrode overlies the p-type germanium region, is electrically coupled to the n-type germanium region, and is configured for coupling to a first electrical potential. A second gate electrode overlies the n-type germanium region and is configured for coupling to a second electrical potential
Data Source
AI summary
A negative differential resistance (NDR) diode and a memory cell incorporating that NDR diode are provided. The NDR diode comprises a p-type germanium region in contact with an n-type germanium region and forming a germanium pn junction diode. A first gate electrode overlies the p-type germanium region, is electrically coupled to the n-type germanium region, and is configured for coupling to a first electrical potential. A second gate electrode overlies the n-type germanium region and is configured for coupling to a second electrical potential. A third electrode is electrically coupled to the p-type germanium region and may be coupled to the second gate electrode. A small SRAM cell uses two such NDR diodes with a single pass transistor.