Selective Area Growth of Germanium in Silicon Waveguides
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Solution Overview
Problem
Selective area growth in semiconductor manufacturing faces challenges such as electrical shorts and lack of planarity due to simultaneous growth on trench walls, which are difficult to address with conventional side wall protective layers.
Innovation Solution
The process involves undercutting the side walls prior to deposition of the side wall protective layer, ensuring the top protective layer overhangs to prevent semiconductor material exposure at corners, allowing for high-quality growth by preventing undesired side wall growth.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a side wall protective layer is deposited to prevent lateral growth, then growth quality improves, but fabrication complexity increases and corner exposure problems persist
Solution Approach 1:
The side walls are undercut before depositing the protective layer, creating an overhang structure that proactively prevents corner exposure and lateral growth initiation. This preliminary geometric modification eliminates the need for complex conformal coating processes while ensuring growth quality.
Solution Approach 2:
The protective layer is positioned not only on the side walls but also extended to cover the corner regions through the undercut overhang structure. This dimensional extension in the horizontal plane prevents exposure at corners where lateral growth typically initiates.
2Object-affected harmful factors
If conventional side wall protective layers are used, then lateral growth is reduced, but corner exposure and undesired side wall growth occur
Solution Approach 1:
The side walls are undercut before depositing the protective layer, creating an overhang structure that proactively prevents corner exposure and lateral growth initiation. This preliminary geometric modification ensures that corners are covered before the growth process begins.
Solution Approach 2:
The undercut creates an asymmetric profile where the protective layer extends further at the corners due to the overhang, providing enhanced coverage at these critical locations compared to a simple vertical side wall configuration.
3Manufacturing precision
If precise etch control is maintained to achieve proper sidewall angles, then growth quality improves, but process robustness decreases
Solution Approach 1:
The undercut is performed as a preliminary step that creates a geometric overhang structure. This overhang provides inherent protection against variations in subsequent etching processes, as the protective layer's coverage is determined by the undercut geometry rather than precise sidewall angle control.
Solution Approach 2:
The process transitions from controlling sidewall angle parameters to controlling the undercut depth parameter. This parameter change makes the process more robust, as the undercut can be controlled with standard etch processes without requiring precise angle control, while still achieving the desired protective overhang.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the integration of dissimilar materials like Germanium and Silicon-Germanium with Silicon technology, improving the quality and reliability of optoelectronic devices by reducing complexity and increasing robustness to etch angle variations, and simplifying fabrication processes.
Implementation Method 1
The side walls are undercut
Implementation Method 2
deposition of the side wall protective layer
Implementation Method 3
semiconductor material is epitaxially grown in features that are lithographically fabricated
Data Source
AI summary
A robust fabrication process for selective area growth of semiconductors in growth windows is provided. Sidewall growth is eliminated by the presence of a spacer layer which covers the sidewalls. Undesirable exposure of the top corners of the growth windows is prevented by undercutting the growth window prior to deposition of the dielectric spacer layer. The effectiveness of this process has been demonstrated by selective-area growth of Ge and Ge/SiGe quantum wells on a silicon substrate. Integration of active optoelectronic devices with waveguide layers via end-coupling through the dielectric spacer layer can be reliably accomplished in this manner.