Germanium-Treated Source/Drain Epitaxy for Lower Contact Resistance
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Solution Overview
Problem
Existing methods for reducing resistance at the interface between source/drain features and contacts in semiconductor devices involve complex processing steps and can cause thermal damage, leading to increased production costs and suboptimal device performance.
Innovation Solution
The method involves forming n-type epitaxial semiconductor layers over n-type source/drain features using a lower processing temperature, followed by a germanium-containing treatment to reduce contact resistance, and then etching to form S/D contacts with reduced thermal impact.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional methods are used to reduce resistance at the source/drain interface, then contact resistance is reduced, but processing complexity increases and thermal damage occurs
Solution Approach 1:
The patent changes the processing temperature parameter by performing epitaxial growth at lower temperatures (e.g., 700-900°C) compared to conventional high-temperature processes. This parameter change reduces thermal damage to existing structures while still achieving low contact resistance through controlled material deposition and in-situ doping, thereby resolving the contradiction between reducing contact resistance and avoiding thermal damage and processing complexity
2Reliability
If conventional methods are used to reduce resistance at the source/drain interface, then contact resistance is reduced, but thermal damage occurs
Solution Approach 1:
The patent implements parameter changes by using lower processing temperatures for epitaxial growth (700-900°C) and controlled doping conditions. This reduces the thermal budget and minimizes thermal damage to previously formed structures such as gate electrodes and insulating layers, while still achieving the desired low contact resistance through optimized deposition and doping parameters
3Reliability
If conventional methods are used to reduce resistance at the source/drain interface, then contact resistance is reduced, but production cost increases
Solution Approach 1:
The patent merges multiple process steps into a single integrated epitaxial growth process with in-situ doping. By combining material deposition and dopant introduction into one step, the patent eliminates separate doping and deposition operations, thereby reducing processing complexity and production costs while achieving low contact resistance
Solution Approach 2:
The patent uses parameter changes including lower temperature processing and optimized doping concentrations to achieve low contact resistance without requiring multiple complex process steps, thereby reducing production costs while maintaining high reliability
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces thermal damage, processing complexity, and production costs while enhancing device performance by lowering contact resistance and improving electrical properties.
Implementation Method 1
forming a first epitaxial semiconductor material layer over the n-type source/drain feature and the p-type source/drain feature
Implementation Method 2
processing the semiconductor material layer with a germanium-containing gas, wherein the processing of the semiconductor material layer with the germanium-containing gas forms a germanium-containing layer over the semiconductor material layer
Data Source
AI summary
A method includes providing a p-type S/D epitaxial feature and an n-type source/drain (S/D) epitaxial feature, forming a semiconductor material layer over the n-type S/D epitaxial feature and the p-type S/D epitaxial feature, processing the semiconductor material layer with a germanium-containing gas, where the processing of the semiconductor material layer forms a germanium-containing layer over the semiconductor material layer, etching the germanium-containing layer, where the etching of the germanium-containing layer removes the germanium-containing layer formed over the n-type S/D epitaxial feature and the semiconductor material layer formed over the p-type S/D epitaxial feature, and forming a first S/D contact over the semiconductor material layer remaining over the n-type S/D epitaxial feature and a second S/D contact over the p-type S/D epitaxial feature. The semiconductor material layer may have a composition similar to that of the n-type S/D epitaxial feature.