GFCI Self-Test Circuit Using Zero-Crossing Detection
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Solution Overview
Problem
Existing GFCI devices with self-test functions often interfere with normal ground fault protection, leading to erroneous tripping or increased response times, especially when self-test signals are generated during critical AC cycles.
Innovation Solution
A GFCI device with a self-test circuit that generates a self-test signal at zero points of the AC power source, using a whole-wave rectifier bridge to ensure the SCR is conductive in both AC half cycles, allowing immediate tripping regardless of when a ground fault occurs, and a device-state indicator for timely user notification.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Extent of automation
If self-test signals are generated during the positive half-cycle of AC power source, then the self-test function can be implemented, but the SCR automatically becomes non-conducting at zero points causing erroneous tripping and affecting normal ground fault detection
Solution Approach 1:
The patent extracts the self-test signal generation from the main AC power cycle and implements it using a dedicated oscillating circuit that operates independently. This separates the self-test function from the AC half-cycle dependency, allowing self-testing without interfering with the SCR conduction state during actual ground fault conditions.
Solution Approach 2:
The patent introduces a coupling circuit as an intermediary between the oscillating circuit and the SCR control. This coupling circuit properly interfaces the self-test signals with the SCR gate, ensuring that self-testing can be performed without causing erroneous tripping or interfering with normal ground fault detection operations.
2Reliability
If self-test signals are generated using negative half-cycle of AC power source, then erroneous tripping is avoided, but the SCR is not conductive during negative half-cycle increasing the response time for ground faults
Solution Approach 1:
The patent implements periodic self-testing using an oscillating circuit that generates test signals at predetermined intervals independent of the AC cycle. This allows the system to perform regular self-diagnostics without being constrained by AC half-cycles, ensuring the SCR remains conductive and ready for immediate ground fault response.
Solution Approach 2:
The system performs preliminary self-tests at predetermined intervals to detect potential failures before they cause actual ground faults. This proactive approach ensures the protection function is working properly without waiting for actual fault conditions or being limited by AC cycle timing.
3Device complexity
If manual testing is required to verify protection function, then device complexity is reduced, but user may not periodically test leading to undetected malfunctions and potential accidents
Solution Approach 1:
The patent implements a self-test function where the GFCI device automatically performs periodic self-diagnostics without requiring user intervention. The oscillating circuit generates self-test signals and the system monitors its own protection function, ensuring continuous verification of operational status.
Solution Approach 2:
The system incorporates feedback mechanisms where the fault detection circuit monitors both actual ground faults and self-test signals. This feedback loop ensures the protection function is continuously verified and can detect when the device itself is malfunctioning, providing users with reliable status information.
Data Source
AI summary
A ground fault circuit interrupter (GFCI) device with self-test function includes: hot and neutral conducting circuits; an fault detection circuit responsive to a fault in the hot and neutral conducting circuits to generate a fault detection signal; a signal driving circuit responsive to the fault detection signal to generate a drive signal; a disconnecting mechanism for disconnecting electrical connections in the hot and the neutral conducting circuits when the drive signal exceeds a predetermined level; a self-test circuit for generating a self-test signal according to a predetermined time period and when an alternating current of the power source passes zero points, generating an evaluation result based on the self-test signal and a feedback signal of a fault detection signal corresponding to the self-test signal, and generating error signals if the evaluation result indicates a circuit error; and a device-state indicator circuit for generating alarms based on the error signals.