GIP Circuit Placement in LCD Bezel Narrowing

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Solution Overview

Problem

The existing liquid crystal display (LCD) devices face challenges in achieving a narrow bezel design due to the limitations of the Gate In Panel (GIP) type, where GIP circuits are typically formed in non-display areas, increasing the number of components and manufacturing costs, and hindering weight and size reduction.

Innovation Solution

The solution involves reconfiguring the GIP circuits to be disposed within the display area, with signal lines and transistors arranged between pixel columns, allowing for a more efficient use of space and reducing the bezel width by integrating GIP circuits within the display area, while maintaining the data driving unit in non-display areas.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If GIP circuits are formed in non-display areas at left and right sides of the display area, then the circuits can be disposed outside the display region, but the bezel width cannot be narrowed and the number of components increases

Engineering Contradiction:
Improvebezel widthVSAvoidnumber of components
Core Design Contradiction:
Area of stationary objectVSDevice complexity

Solution Approach 1:

The patent merges the GIP circuits with the display area by disposing signal lines and transistors within the display region, specifically between pixel columns. This integration eliminates the need for separate non-display area circuits, reducing the overall component count and enabling narrower bezel width while maintaining circuit functionality.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent transitions the GIP circuit placement from a two-dimensional arrangement in non-display areas to a spatial arrangement within the display area by utilizing the vertical space between pixel columns. This dimensional reconfiguration allows circuits to be embedded within the display region without increasing bezel width.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Weight of stationary object

If GIP circuits are formed in non-display areas, then component placement is simplified, but weight and size of the LCD device cannot be decreased

Engineering Contradiction:
Improvedevice weightVSAvoidcomponent placement
Core Design Contradiction:
Weight of stationary objectVSEase of manufacture

Solution Approach 1:

The patent combines the GIP circuits with the display panel structure by forming signal lines and transistors within the display area using the same manufacturing processes. This merging eliminates separate component attachment steps (such as TCP or COF methods), reducing device weight and simplifying the manufacturing process while maintaining ease of production.

Inventive Principle:
Principle #5Merging (Combining)

3Area of stationary object

If signal lines and transistors are disposed between pixel columns in the display area, then bezel width is narrowed, but space utilization becomes more complex

Engineering Contradiction:
Improvebezel widthVSAvoidspace arrangement
Core Design Contradiction:
Area of stationary objectVSDevice complexity

Solution Approach 1:

The patent applies local quality by specifically utilizing the space between pixel columns for GIP circuit placement. This localized arrangement targets the unused vertical spaces within the display region, allowing circuit integration without affecting pixel density or overall display area, thereby narrowing the bezel while managing spatial complexity.

Inventive Principle:
Principle #3Local quality

Data Source

PatentEP3193325B1Liquid crystal display device
Publication Date: 2020.11.11 LG DISPLAY CO LTD
  • EP3193325B1 patent drawingFigure 1~2
  • EP3193325B1 patent drawingFigure 3
  • EP3193325B1 patent drawingFigure 4

AI summary

A liquid crystal display device includes a display panel including a display area (AA) and a non-display area (NAA). In the display area, m/2 (m is a positive even number) data lines (DL1 - DL5) of a first direction and 2n (n is an integer more than 5) gate lines (GL2 - GL7) of a second direction cross each other to thereby define m × n pixels (150). Two gate lines are disposed between two adjacent pixel rows, and two pixel columns are disposed between two adjacent two data lines. Furthermore 2n gate driver in panel (GIP) circuits are located in the display area, each including signal lines (QL) and transistors (T1-T5), wherein the signal lines and the transistors are separately disposed between the two pixel columns.