Glass Embedded Bridge Package Structure for Low-Warpage Chip Integration

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Solution Overview

Problem

The increasing demand for smaller and lighter electronic devices with high performance and high capacity in semiconductor packages leads to issues of memory latency and warpage, necessitating improved structural stiffness and closer chip connections.

Innovation Solution

A semiconductor package design incorporating a glass interposer with through-glass vias and bridge chips to enhance structural stiffness, reduce warpage, and facilitate closer chip connections through a redistribution layer structure.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Length of moving object

If the semiconductor package size is reduced to make electronic devices smaller and lighter, then the device dimensions are improved, but the structural stiffness deteriorates leading to warpage

Engineering Contradiction:

Improvepackage sizeVSAvoidstructural stiffness

Core Design Contradiction:

Length of moving objectVSStability of the object's composition

Solution Approach 1:

The patent employs a composite structure combining glass substrate, silicon bridge chip, and organic substrate to achieve optimal structural stiffness. The glass substrate provides dimensional stability and low warpage, while the silicon bridge chip with through-silicon vias enhances mechanical strength and electrical connectivity, creating a composite assembly that maintains rigidity in compact form factors.

Inventive Principle:

Principle #40Composite materials

Solution Approach 2:

The patent transitions from planar chip arrangement to three-dimensional vertical stacking with the bridge chip positioned between semiconductor chips at different heights. Through-silicon vias enable vertical electrical connections, allowing closer chip integration in the Z-direction while maintaining overall package compactness and structural integrity.

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

2Reliability

If chips are connected closer to enhance performance and capacity, then the electrical connectivity is improved, but the power consumption increases

Engineering Contradiction:

Improveelectrical connectivityVSAvoidpower consumption

Core Design Contradiction:

ReliabilityVSUse of energy by moving object

Solution Approach 1:

The silicon bridge chip serves as an intermediary component between semiconductor chips, providing efficient electrical interconnection through through-silicon vias and redistribution layers. This intermediary structure enables short-distance high-speed signal transmission and power distribution, reducing overall power consumption compared to longer external connections while enhancing electrical connectivity and system performance.

Inventive Principle:

Principle #24Intermediary (Mediator)

Data Source

PatentUS20250323134A1Panel-level glass based embedded silicon bridge package and method of manufacturing the same

Publication Date: 2025.10.16 SAMSUNG ELECTRONICS CO LTD

AI summary

Provided is a semiconductor package including a first redistribution layer, a second redistribution layer, a glass substrate between the first redistribution layer and the second redistribution layer, the glass substrate including a through-glass via configured to connect the first redistribution layer and the second redistribution layer, a first semiconductor chip and a second semiconductor chip on a second surface of the second redistribution layer, and a bridge chip included in the glass substrate and configured to connect the first semiconductor chip and the second semiconductor chip.