Glass Carrier Semiconductor Package for AiP Miniaturization

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Solution Overview

Problem

The existing Antenna-in-Package (AiP) systems using organic substrates face challenges in achieving fine-pitch designs and miniaturization due to thickness constraints, leading to increased manufacturing costs and size limitations in wireless communication devices.

Innovation Solution

A semiconductor device package utilizing a glass carrier with a redistribution layer (RDL) and interconnection structures, where the antenna layer is disposed on one surface and the package body on the other, allowing for precise control of thickness and miniaturization, and including a method of manufacturing that involves forming circuit layers, interconnection structures, and encapsulating electronic components.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If an organic substrate is used in an AiP system, then the manufacturing process is simpler, but the substrate thickness is relatively thick and fine-pitch (less than 15/15 μm) is difficult to achieve

Engineering Contradiction:
Improvemanufacturing process simplicityVSAvoidfine-pitch capability
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The patent changes the substrate material from organic to glass, fundamentally altering the material parameters to enable fine-pitch manufacturing capability while maintaining manufacturing feasibility through standardized glass processing techniques

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent employs a composite structure combining glass substrate with multiple functional layers (circuit layers, antenna layers, package bodies) to achieve both fine-pitch precision and manufacturing ease through modular layer integration

Inventive Principle:
Principle #40Composite materials

2Ease of manufacture

If an organic substrate is used in an AiP system, then the manufacturing process is simpler, but the package size cannot be reduced

Engineering Contradiction:
Improvemanufacturing process simplicityVSAvoidpackage size
Core Design Contradiction:
Ease of manufactureVSVolume of moving object

Solution Approach 1:

The patent changes the substrate material from organic to glass, fundamentally altering the material parameters to enable fine-pitch manufacturing capability while maintaining manufacturing feasibility through standardized glass processing techniques

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent utilizes multi-layer stacking in the vertical dimension (circuit layers, antenna layers, package bodies) to integrate multiple functions within a compact footprint, achieving miniaturization through three-dimensional space utilization

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Reliability

If separate manufacturing of antenna and communication module is performed, then each component can be optimized independently, but manufacturing costs increase

Engineering Contradiction:
Improvecomponent optimizationVSAvoidmanufacturing cost
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent merges the antenna and communication module into a single integrated package structure, where both components share the same glass substrate and manufacturing process, eliminating separate manufacturing costs while maintaining independent optimization capability through distinct functional layers

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS10903561B2Semiconductor device package and method of manufacturing the same
Publication Date: 2021.01.26 ADVANCED SEMICON ENG INC
  • US10903561B2 patent drawing
  • US10903561B2 patent drawing
  • US10903561B2 patent drawing

AI summary

A semiconductor device package includes a first glass carrier, a package body, a first circuit layer and a first antenna layer. The first circuit layer is disposed on the first surface of the first glass carrier. The first circuit layer has a redistribution layer (RDL). The package body is disposed on the first circuit layer. The package body has an interconnection structure penetrating the package body and is electrically connected to the RDL of the first circuit layer. The first antenna layer is disposed on the second surface of the first glass carrier.