Glass Substrate Chip Packaging With Metal Posts to Cut TSV Interposer Cost
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Solution Overview
Problem
Current 2.5DIC packaging structures with TSV interposers result in high packaging costs due to the need for intermediate connectors, limiting the economic viability of semiconductor chip packaging.
Innovation Solution
A packaging structure and method utilizing a glass substrate with pre-formed metal connecting posts, where semiconductor chips are electrically connected to metal bumps and a C4 layer, reducing the number of process steps and manufacturing costs by using the glass substrate as an intermediate conduction layer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a TSV interposer is used as an intermediate connector in 2.5DIC packaging structure, then electrical connection between chips and substrate is achieved, but packaging cost increases significantly
Solution Approach 1:
The patent extracts and removes the TSV interposer from the packaging structure, replacing it with direct metal connecting posts formed in the glass substrate. This eliminates the intermediate connector that caused high costs while maintaining the essential electrical connection function through alternative means (metal posts + wire bonding).
Solution Approach 2:
The patent replaces the expensive TSV interposer with simpler, cheaper metal connecting posts that can be directly formed in the glass substrate. These posts serve the same electrical connection purpose but at significantly lower cost, aligning with the principle of using economical alternatives when performance requirements are met.
2Reliability
If multiple process steps are used to achieve electrical connection in traditional packaging, then reliable electrical connection is established, but manufacturing complexity and time increase
Solution Approach 1:
The patent merges the functions of the TSV interposer and the connection structure into a single integrated approach: metal connecting posts are directly formed in the glass substrate, combining the mechanical support and electrical connection functions that were previously separated across multiple components and process steps.
Solution Approach 2:
The metal connecting posts are pre-formed in the glass substrate before chip mounting, establishing the electrical connection pathway in advance. This preliminary action simplifies subsequent steps by having the connection infrastructure ready before chips are attached and wire-bonded.
Data Source
AI summary
The present disclosure provides a chip packaging structure and a method for preparing the same. The packaging structure includes a glass substrate, metal connecting posts, a first packaging layer, a connection layer, semiconductor chips, a filler layer, a second packaging layer, a controlled collapse chip connection (C4) layer, a base substrate, and a heat sink housing. In the present disclosure, metal connecting posts are pre-formed in a glass substrate, so that the glass substrate serves as an intermediate conduction layer, and the semiconductor chips and the C4 layer are respectively formed at opposite ends of the metal connecting posts to perform electrical connections, so that the number of process steps for preparing the packaging structure is minimized and the manufacturing cost is reduced.