Glass Core Package Substrates With CTE Stacking for Crack Resistance
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Solution Overview
Problem
Glass core substrates in integrated circuit packages are prone to seware failures due to defects and thermal expansion mismatches, leading to cracks and mechanical instability, which affect signal transmission and power delivery.
Innovation Solution
Implementing multiple distinct glass cores with varying coefficients of thermal expansion (CTE) stacked together, along with a buffer material to absorb stress, and using power delivery interconnects like coaxial magnetic inductor loops and plated magnetic vias to enhance electrical pathways.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If glass core substrates are used in integrated circuit packages, then signal losses are reduced and plated through-hole density is increased, but seware failures occur due to thermal expansion mismatches causing cracks and mechanical instability
Solution Approach 1:
The substrate is divided into multiple glass core layers, each with different coefficients of thermal expansion (CTE). The first glass core layer has a CTE matched to the build-up region, while the second glass core layer has a CTE matched to the interconnects. This segmentation allows each layer to accommodate thermal expansion differently, preventing stress concentration and seware failures while maintaining the benefits of glass core substrates including reduced signal losses and increased plated through-hole density
Solution Approach 2:
Different regions of the substrate are assigned different glass core materials with specific CTE properties tailored to their local requirements. The first glass core layer is positioned adjacent to the build-up region and has CTE matched to it, while the second glass core layer is positioned adjacent to the interconnects and has CTE matched to them. This local quality approach ensures optimal thermal matching in each region, preventing cracks and mechanical instability
2Reliability
If multiple glass core layers with different CTE are stacked, then thermal expansion stress is reduced, but device complexity and fabrication difficulty increase
Solution Approach 1:
The substrate is segmented into multiple glass core layers with distinct CTE properties, where the first glass core layer is positioned adjacent to the build-up region and the second glass core layer is positioned adjacent to the interconnects. This segmentation allows each layer to be optimized for its specific thermal environment, reducing overall stress while maintaining manageable complexity through systematic layering
Solution Approach 2:
The substrate employs a composite structure combining multiple glass core layers with different coefficients of thermal expansion. This composite material approach allows the substrate to leverage the thermal expansion characteristics of each glass type, achieving balanced stress distribution and improved mechanical stability without requiring entirely new materials, thus managing complexity
3Reliability
If buffer material is added to absorb stress between glass cores, then crack propagation is reduced, but manufacturing steps and production time increase
Solution Approach 1:
A buffer material is introduced as an intermediary layer between the first and second glass core layers. This buffer material absorbs and distributes thermal expansion stress, preventing crack propagation between the glass cores with different CTE values. The intermediary buffer layer acts as a stress-relief mechanism that protects the structural integrity of the substrate while maintaining efficient manufacturing processes
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces stress-induced cracks, enhances mechanical support, and improves signal integrity and power delivery by gradient thermal matching and efficient electrical routing within the substrate.
Implementation Method 1
stacks of glass layers having different coefficients of thermal expansion
Implementation Method 2
a buffer material to absorb stress
Implementation Method 3
power delivery interconnects like coaxial magnetic inductor loops and plated magnetic vias to enhance electrical pathways
Data Source
AI summary
Systems, apparatus, articles of manufacture, and methods for power delivery through package substrates with stacks of glass layers having different coefficients of thermal expansion are disclosed. An example integrated circuit (IC) package includes: a package core including a first glass sheet and a second glass sheet distinct from the first glass sheet, the first glass sheet having a different coefficient of thermal expansion (CTE) from the second glass sheet; a first redistribution layer on a first side of the package core; a second redistribution layer on a second side of the package core, the second side opposite the first side; and an interconnect extending through the package core, the interconnect including a magnetic material.


