Glass-Core EMIB Fan-Out Package to Minimize Die Warpage
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Solution Overview
Problem
Conventional die manufacturing techniques face challenges with die warpage due to CTE mismatches between materials in multi-die architectures, leading to decreased yield and exposure issues during planarization operations.
Innovation Solution
The use of a glass core that surrounds multiple dies and a glass carrier to provide dimensional stability, matching the CTE of various components and reducing warpage, along with conductive vias and a redistribution layer for improved connectivity and assembly processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If multiple dies are integrated using silicon bridges and conventional materials, then heterogeneous-chip package functionality is achieved, but die warpage occurs due to CTE mismatches between materials
Solution Approach 1:
A glass core is introduced as an intermediary substrate between multiple dies and silicon bridges. The glass core has a CTE that matches both the dies and silicon bridges, serving as a mediator that eliminates CTE mismatch issues. This allows the heterogeneous-chip package to function properly without die warpage, as the glass core accommodates thermal expansion differences between different materials.
Solution Approach 2:
The patent uses a composite structure combining glass core, silicon bridges, and multiple dies. The glass core material is specifically selected to have CTE properties that bridge the gap between different die materials and silicon bridges, creating a composite system where thermal expansion is harmonized across all components, preventing warpage while maintaining heterogeneous functionality.
2Manufacturing precision
If planarization operation is performed to expose copper pillars and die interconnects, then connectivity is achieved, but die warpage prevents simultaneous exposure without removing significant portions of the die
Solution Approach 1:
The glass core acts as a stable intermediary platform that maintains planarity during manufacturing. Because the glass core has matched CTE properties, it prevents die warpage that would otherwise occur during planarization. This stability allows copper pillars and die interconnects to be exposed simultaneously through standard planarization processes without needing to remove excessive die material, thereby improving manufacturing precision while minimizing die loss.
3Shape
If CTE mismatch of materials is reduced, then die warpage is reduced, but material formulation limitations prevent complete elimination of warpage
Solution Approach 1:
Rather than attempting to modify multiple materials to achieve CTE matching (which is limited by material formulation constraints), the patent introduces a glass core as a dedicated intermediary material specifically engineered to have CTE properties that match both the dies and silicon bridges. This approach simplifies manufacturing by using a single material solution rather than modifying multiple existing materials, overcoming formulation limitations while effectively eliminating die warpage.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach minimizes die warpage and enhances yield by providing a stable base for assembly, allowing for effective exposure of copper pillars and die interconnects during planarization, and supports advanced interconnect bridges for improved thermal performance.
Implementation Method 1
The CTE of the glass core may be substantially the same as a CTE of a dielectric layer surrounding the interposer and/or a CTE of an encapsulation layer surrounding the plurality of dies. By matching CTE values, the glass core minimizes thermal expansion mismatches that would otherwise cause die warpage during temperature variations in the packaging process.
Implementation Method 2
conductive vias formed through the glass core
Implementation Method 3
The use of a glass core that surrounds multiple dies and a glass carrier to provide dimensional stability
Implementation Method 4
redistribution layer for improved connectivity and assembly processes
Data Source
AI summary
Embodiments disclosed herein include electronic packages and methods of forming such packages. In an embodiment, a microelectronic device package may include a redistribution layer (RDL) and an interposer over the RDL. In an embodiment, a glass core may be formed over the RDL and surround the interposer. In an embodiment, the microelectronic device package may further comprise a plurality of dies over the interposer. In an embodiment, the plurality of dies are communicatively coupled with the interposer.