Glass Core IC Package Interconnects for Fine-Pitch Reliability
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Solution Overview
Problem
Conventional approaches for coupling multiple dies in IC packages face challenges in achieving finer pitch interconnect density, leading to reliability issues and increased complexity, particularly when using a glass core due to delamination risks of conductive materials and alignment errors.
Innovation Solution
Incorporating a glass core with conductive through-glass vias (TGVs) and a dielectric layer with conductive pathways, along with interconnects such as solder or liquid metal ink, metal-metal bonds, and dielectric-dielectric bonds to reduce delamination risks and improve connectivity, while using underfill materials to mitigate thermal stress.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional approaches are used for coupling multiple dies in IC packages, then assembly is simpler, but interconnect density and reliability are insufficient
Solution Approach 1:
The package substrate is segmented into a glass core with through-glass vias (TGVs) and separate dielectric layers. This segmentation allows for finer pitch interconnects by dividing the interconnection function across multiple specialized layers, improving reliability while managing complexity through modular construction
Solution Approach 2:
A dielectric layer with conductive pathways is introduced as an intermediary between the glass core and the dies. This intermediate layer acts as a buffer that reduces delamination risks and provides alignment tolerance, thereby improving interconnect reliability without significantly increasing assembly complexity
2Manufacturing precision
If glass core is used to achieve finer pitch interconnect density, then interconnect density improves, but delamination risk increases
Solution Approach 1:
A dielectric layer is placed between the glass core and the conductive pathways, serving as an intermediary that prevents direct contact between incompatible materials. This reduces delamination risk while maintaining the fine pitch precision of the TGV interconnects
Solution Approach 2:
The package substrate uses a composite structure combining glass core with through-glass vias, dielectric layers, and conductive pathways. This composite material approach allows each layer to contribute its optimal properties: the glass core provides structural integrity and via precision, while the dielectric layer provides delamination resistance
3Manufacturing precision
If through-glass vias are used to increase interconnect density, then signal loss increases, but interconnect density improves
Solution Approach 1:
The interconnection path is segmented into multiple sections: TGVs in the glass core, conductive pathways in dielectric layers, and bonding interfaces. This segmentation allows optimization of each section to minimize signal loss while maintaining high overall interconnect density
Solution Approach 2:
The design changes physical parameters of the interconnect structure, including via diameter, via spacing, and conductive pathway geometry, to optimize signal transmission. By carefully controlling these parameters, the patent achieves high interconnect density while minimizing signal loss through the glass core
4Device complexity
If conventional interconnect methods are used, then assembly is simpler, but total thickness variation increases
Solution Approach 1:
The glass core thickness and dielectric layer thickness are precisely controlled during manufacturing to maintain consistent total thickness. This parameter control reduces thickness variation while the modular structure allows for simplified assembly processes
Data Source
AI summary
Disclosed herein are microelectronic assemblies and related devices and methods. In some embodiments, a microelectronic assembly may include a glass layer having a surface, the glass layer including conductive through-glass vias (TGVs); a dielectric layer at the surface of the glass layer, the dielectric layer including conductive pathways; and interconnects between the surface of the glass layer and the dielectric layer, wherein individual interconnects electrically couple individual TGVs to individual conductive pathways. In some embodiments, the interconnects include solder or liquid metal ink. In some embodiments, the interconnects include metal-metal bonds and dielectric-dielectric bonds.