Glass-Core PCB Substrate Structure for Package Warpage Reduction

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Solution Overview

Problem

Existing integrated circuit (IC) packaging technologies face challenges with warpage due to the addition of multiple IC dies, leading to larger package sizes and reduced reliability, particularly in chiplet systems where organic bridges have wider pitches and silicon bridges are expensive and have longer process flows.

Innovation Solution

Incorporating a stiffening layer made of ceramic or glass in the substrate to reduce warpage, utilizing through-layer vias and conductive traces to provide electrical continuity and thermal management, with multilayer structures designed to counteract thermal expansion coefficients.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If multiple IC dies are integrated into a single package, then system integration efficiency is improved, but package area form factor increases leading to warpage susceptibility

Engineering Contradiction:

Improvesystem integration efficiencyVSAvoidpackage warpage resistance

Core Design Contradiction:

Adaptability or versatilityVSReliability

Solution Approach 1:

The patent employs a composite substrate structure combining organic material layers with embedded stiffening layers (ceramic or glass). This composite construction provides the necessary mechanical rigidity to prevent warpage while accommodating multiple IC dies, thus resolving the contradiction between integration efficiency and warpage resistance.

Inventive Principle:

Principle #40Composite materials

Solution Approach 2:

The substrate is segmented into multiple functional layers including organic material layers, stiffening layers, and redistribution layers. This segmentation allows each layer to perform its specific function - the organic layers provide flexibility and electrical connectivity while the stiffening layers provide mechanical support, collectively preventing warpage in large integrated packages.

Inventive Principle:

Principle #1Segmentation

2Ease of manufacture

If organic bridges are used for IC interconnection, then manufacturing ease is improved, but pitch width increases reducing IC density

Engineering Contradiction:

Improvebridge manufacturing easeVSAvoidIC pitch width

Core Design Contradiction:

Ease of manufactureVSArea of moving object

Solution Approach 1:

The patent changes the physical parameters of the bridge structure by using thin-film deposition techniques to create metal traces on the substrate surface. This allows for significantly reduced pitch widths compared to traditional organic bridges, while the traces can still be manufactured using standard semiconductor fabrication processes, maintaining ease of manufacture.

Inventive Principle:

Principle #35Parameter changes

3Reliability

If silicon bridges are used for IC interconnection, then electrical performance is improved, but manufacturing complexity and cost increase

Engineering Contradiction:

Improveelectrical connection reliabilityVSAvoidprocess flow complexity

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The patent introduces an intermediary substrate structure with embedded redistribution layers that mediates between the IC dies. This substrate with its conductive traces and vias provides the necessary electrical connectivity without requiring complex silicon bridge structures, thus maintaining electrical performance while simplifying the manufacturing process.

Inventive Principle:

Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The stiffening layers effectively reduce warpage and improve coplanarity, enabling smaller package sizes and higher IC density while maintaining electrical integrity and thermal insulation.

Implementation Method 1

multilayer structures designed to counteract thermal expansion coefficients

Methodology Applied

Scientific EffectThermal expansion coefficient matching: Thermal Expansion

Implementation Method 2

utilizing through-layer vias and conductive traces to provide electrical continuity

Methodology Applied

Scientific EffectElectrical conduction: Conduction (electrical)

Implementation Method 3

maintaining electrical integrity and thermal insulation

Methodology Applied

Scientific EffectThermal insulation: Thermal Insulation

Data Source

PatentUS12476176B2Glass core substrate printed circuit board for warpage reduction

Publication Date: 2025.11.18 INTEL CORP

AI summary

An electronic device comprises a first redistribution layer (RDL) including multiple sublayers of conductive traces formed in an organic material; a stiffening layer including one of a ceramic or glass, the stiffening layer including a first surface contacting a first surface of the first RDL and including a through layer via (TLV); and multiple integrated circuit (ICs) arranged on a second surface of the first RDL and including bonding pads, wherein the conductive traces of the first RDL provide electrical continuity between at least one bonding pad of the ICs and at least one TLV of the stiffening layer.