Glass-Core Photonic IC Packaging With Coupled Sub-Packages

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Solution Overview

Problem

Integrated circuit (IC) packages with silicon photonics face performance degradation due to the addition of multiple semiconductor dies, metal interconnects, and optical units, which increase bandwidth requirements and power consumption, and existing solutions using glass cores with embedded photonic integrated circuits (PICs) are limited in reducing the need for multiple dies and metal interconnects.

Innovation Solution

The use of two electrically coupled sub-package components with a glass core substrate, each supporting different components of the photonic circuit, reduces the need for multiple dies and metal interconnects by electrically coupling sub-packages through contacts, allowing for efficient integration of a PIC within the package.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If multiple semiconductor dies and metal interconnects are added to achieve photonic integration, then functional requirements are met, but bandwidth requirements and power consumption increase

Engineering Contradiction:
Improvephotonic integration capabilityVSAvoidpower consumption
Core Design Contradiction:
Adaptability or versatilityVSUse of energy by moving object

Solution Approach 1:

The patent combines the photonic integrated circuit (PIC) and semiconductor die into a single integrated package substrate, eliminating the need for separate metal interconnects and reducing the number of discrete components. This merging approach maintains photonic integration capability while reducing power consumption by eliminating multiple interconnect interfaces and associated signal transmission paths.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The package substrate is designed to serve multiple functions simultaneously: it acts as both the mounting platform for the PIC and the interconnect medium for electrical signals. This multi-functional design reduces the need for dedicated metal interconnect layers and separate bonding substrates, thereby reducing overall power consumption while maintaining full photonic integration functionality.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Adaptability or versatility

If multiple semiconductor dies and metal interconnects are added to achieve photonic integration, then functional requirements are met, but interconnect complexity increases

Engineering Contradiction:
Improvephotonic integration capabilityVSAvoidinterconnect complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent merges the PIC and semiconductor die into a single integrated structure on the package substrate, eliminating the need for complex metal interconnect networks that would be required to connect separate dies. This reduces interconnect complexity by replacing multiple metal trace paths with direct integration, while maintaining full photonic integration capability through the unified design.

Inventive Principle:
Principle #5Merging (Combining)

3Device complexity

If glass core with embedded PIC is used, then need for multiple dies is reduced, but manufacturing complexity remains high

Engineering Contradiction:
Improvenumber of diesVSAvoidmanufacturing complexity
Core Design Contradiction:
Device complexityVSEase of manufacture

Solution Approach 1:

The patent segments the photonic integration system into two main components: the package substrate (which may use glass core) and the semiconductor die, which are then integrated together. This segmentation allows each component to be manufactured using optimized processes for its specific requirements, reducing overall manufacturing complexity compared to attempting to embed the entire PIC within the glass core alone.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The package substrate serves as an intermediary between the PIC and the semiconductor die, providing a standardized interface that simplifies manufacturing. Rather than directly embedding the PIC in the glass core, the substrate acts as a mediator that enables modular assembly and standardization, thereby reducing manufacturing complexity while maintaining the reduced die count benefit.

Inventive Principle:
Principle #24Intermediary (Mediator)

4Reliability

If two electrically coupled sub-package components with glass core are used, then electrical and optical performance is enhanced, but manufacturing process complexity increases

Engineering Contradiction:
Improveelectrical and optical performanceVSAvoidmanufacturing process complexity
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent divides the photonic system into two electrically coupled sub-package components that can be manufactured and tested separately before final integration. This segmentation enables specialized manufacturing processes for each component (optimizing for electrical or optical performance as needed) while maintaining overall system performance, and reduces manufacturing complexity by allowing parallel processing and quality control at intermediate stages.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS20240219629A1Photonic integrated circuits with glass cores
Publication Date: 2024.07.04 INTEL CORP
  • US20240219629A1 patent drawing
  • US20240219629A1 patent drawing
  • US20240219629A1 patent drawing

AI summary

Methods, apparatus, systems, and articles of manufacture are disclosed utilizing photonic integrated circuits with glass cores. An example apparatus comprises a primary package substrate including a glass core and first contacts along an outer surface of the primary package substrate, a photonic integrated circuit (PIC) within the primary package substrate adjacent a surface of the glass core, and a secondary package substrate supporting a semiconductor die on a first side of the secondary package substrate, the secondary package substrate including second contacts on a second side of the secondary package substrate, the first contacts electrically coupled to the second contacts.