Glass Core Routing Reduces Insertion Loss
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Solution Overview
Problem
High-speed serial interfaces experience increased insertion loss when routed on traditional electronic packages with standard buildup thicknesses, leading to higher costs and manufacturing complexities due to the need for additional metal layers and copper density variations.
Innovation Solution
Implementing a multi-layer core with glass or buildup film and glass layers, which allows for low-loss signal routing without the need for skip layers, reducing the package layer count and avoiding manufacturing complexities by using glass cores to provide lower capacitance and enable wider trace widths and spacings.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If skip-layer routing is used to reduce insertion loss, then signal loss is reduced, but package layer count increases
Solution Approach 1:
The patent extracts the problematic metal layers from the routing path by creating voids in the metal layers above and below the signal routing layer. This removes the source of insertion loss (metal layer interference) while maintaining the original package layer count, avoiding the need to add skip layers.
Solution Approach 2:
The patent changes the dielectric thickness parameter by creating effective dielectric thickness increase through metal layer voiding. This allows the signal traces to achieve lower insertion loss by having more dielectric material between the signal layer and adjacent metal layers, without physically adding more layers to the package.
2Loss of energy
If skip-layer routing is implemented, then signal loss is reduced, but manufacturing complexity increases
Solution Approach 1:
The patent extracts unnecessary metal from specific regions by creating voids in the metal layers. This is achieved through standard PCB fabrication processes where metal layers are selectively removed in designated areas, simplifying the manufacturing process compared to implementing skip-layer routing which requires additional layer management.
Solution Approach 2:
The patent uses the existing metal layer structure as a template and selectively removes metal from specific regions. This approach leverages the standard metal layer fabrication process and simply adds a metal removal step, rather than requiring the development of entirely new routing layer structures.
3Loss of energy
If metal layers are voided for skip-layer routing, then insertion loss is reduced, but copper density variations increase
Solution Approach 1:
The patent applies metal layer voiding only in specific local regions where signal routing requires reduced insertion loss, rather than uniformly voiding entire metal layers. This localized approach maintains copper density uniformity in regions where it is not needed, while achieving the desired signal performance in specific routing areas.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces insertion loss while maintaining impedance targets, lowers package costs, and simplifies manufacturing by eliminating the need for additional metal layers and copper density variations, resulting in a more efficient and cost-effective electronic package design.
Implementation Method 1
using glass cores to provide lower capacitance and enable wider trace widths and spacings
Data Source
Figure 1A~1B
Figure 2A
Figure 2B~2C
AI summary
Embodiments disclosed herein include a package core. In an embodiment, the package core includes a first layer, where the first layer comprises glass. In an embodiment, a second layer is over the first layer, where the second layer comprises glass. In an embodiment, a third layer is over the second layer, where the third layer comprises glass. In an embodiment, a first trace is between the first layer and the second layer. In an embodiment, a second trace is between the second layer and the third layer.