Glass Interposer Semiconductor Package for Compact Fan-Out Layout
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Solution Overview
Problem
The challenge in semiconductor packaging lies in achieving compact size, low manufacturing cost, and improved electrical properties while addressing the difficulties in handling and testing small semiconductor chips, as well as the inefficiency in utilizing the area allocated to the semiconductor chip in fan-out panel level packages.
Innovation Solution
A semiconductor package is designed with a first redistribution substrate, a module structure including an interposer substrate with a glass core and two semiconductor chips electrically connected through an upper buildup portion, and a molding layer that covers the module structure, providing structural stability and efficient electrical connections.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If fan-out panel level package is used to accommodate small semiconductor chips, then the semiconductor chip area utilization is improved, but the area allocated to the semiconductor chip becomes excessively large
Solution Approach 1:
The package structure is segmented into distinct functional areas: a first region containing the semiconductor chip and a second region containing the module structure. This segmentation allows the semiconductor chip to be positioned in an area optimized for its function, while the module structure occupies a separate region, thereby improving area utilization and avoiding excessive allocation.
2Length of moving object
If small semiconductor chips are used to achieve compact size, then the package size is reduced, but it becomes difficult to adhere, handle, and test solder balls
Solution Approach 1:
A module structure is introduced as an intermediary component that includes a second semiconductor chip and associated structures. This module structure serves as a mediator that simplifies the handling and testing processes by providing a larger, more accessible interface for solder ball attachment and testing operations, while the overall package remains compact due to the integrated design.
3Reliability
If electrical properties are improved through structural modifications, then the package performance is enhanced, but the fabrication process complexity increases
Solution Approach 1:
The module structure is merged with the interposer substrate to form an integrated assembly. This merging combines multiple functions (electrical connection, mechanical support, and signal routing) into a single structure, which improves electrical properties by reducing connection paths and parasitic effects, while simplifying the fabrication process by reducing the number of separate assembly steps.
Data Source
AI summary
A semiconductor package includes: a first redistribution substrate; a module structure on the first redistribution substrate; a first molding layer on the first redistribution substrate and surrounding the module structure; and a vertical connection structure on a side of the module structure, the vertical connection structure vertically extending and connected to the first redistribution substrate, wherein the module structure includes: an interposer substrate including a glass substrate, and a first semiconductor chip mounted on the interposer substrate; and a second semiconductor chip mounted on the interposer substrate.