Glass Interposer Routing Structure Without CVD or CMP
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Solution Overview
Problem
Conventional silicon interposer manufacturing processes require costly chemical vapor deposition (CVD) and chemical mechanical polishing (CMP), increasing manufacturing time and costs.
Innovation Solution
The formation of grooves on the conductive through holes of an interposer body allows direct formation of a routing structure without the need for a passivation layer, thereby eliminating the CVD and CMP processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If CVD and CMP processes are used to manufacture silicon interposer, then manufacturing precision and reliability are improved, but manufacturing time and material cost increase substantially
Solution Approach 1:
The patent extracts and removes the CVD and CMP processes from the interposer manufacturing flow. By using a glass interposer with pre-formed conductive through-holes and direct routing layer formation, the complex passivation layer deposition and polishing steps are eliminated, significantly reducing manufacturing cycle time while maintaining sufficient precision for the application
Solution Approach 2:
The patent adopts a glass interposer substrate that can be manufactured more economically than silicon interposers requiring CVD/CMP. The glass substrate serves its interposer function without needing the ultra-precise surface finish that would require expensive and time-consuming CMP processing, achieving cost and time efficiency
2Manufacturing precision
If CVD and CMP processes are used to manufacture silicon interposer, then manufacturing precision and reliability are improved, but material cost increases substantially
Solution Approach 1:
The patent extracts and eliminates the need for expensive CVD passivation layer materials and CMP consumables (polishing pads, slurries, etc.). By using a glass substrate with direct routing layer formation, the material costs associated with silicon interposer manufacturing are substantially reduced
Solution Approach 2:
The patent substitutes expensive silicon substrate requiring expensive processing materials with a more economical glass substrate that achieves the required function without needing costly CVD and CMP materials, thereby reducing overall material cost
3Reliability
If conventional silicon interposer process is used, then electrical connectivity and structural integrity are ensured, but device complexity increases
Solution Approach 1:
The patent segments the interposer manufacturing into simpler, more manageable steps: providing a glass substrate with pre-formed conductive through-holes, forming routing layers directly on the substrate, and bonding chips. This segmentation eliminates the complex integrated CVD-CMP process while ensuring electrical connectivity through the conductive through-holes
Solution Approach 2:
The patent uses a glass interposer that can be manufactured with simpler processes, reducing device complexity. The glass substrate with direct routing layer formation replaces the complex silicon-based CVD/CMP process, achieving the same electrical connectivity function with fewer and simpler manufacturing steps
Data Source
AI summary
An electronic package and a manufacturing method thereof and an interposer are provided, in which grooves are formed on conductive through holes on a back side of an interposer body of the interposer, and a routing structure electrically connected to the conductive through holes is formed directly on the back side of the interposer body and in the grooves, without a passivation layer to be formed, such that the CVD process and CMP process are omitted, thereby effectively simplifying the manufacturing process and saving a lot of manufacturing time and material costs.