Glass Interposer Thermal Isolation for 3D Semiconductor Packages
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The challenge in semiconductor die assemblies is the excessive heat generated by higher power logic dies, which compromises the operational and longevity thresholds of adjacent DRAM dies due to inadequate thermal isolation, particularly in 3-D packages where heat is transferred through conductive vias and materials.
Innovation Solution
The implementation of a glass interposer to separate the logic die from the DRAM die stack, utilizing proximity coupling for signal transmission and eliminating conductive vias and metal pillars, while employing a dielectric molding compound and heat spreader for thermal management.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conductive vias and metal pillars are used to connect logic die and DRAM dice in 3-D packages, then electrical connectivity is achieved, but heat is transferred from logic die to DRAM dice causing temperature to exceed operational thresholds
Solution Approach 1:
A glass interposer is introduced as an intermediary substrate between the logic die and DRAM dice stack. The interposer provides electrical connectivity through embedded conductors while its glass material provides thermal isolation, preventing heat transfer from the logic die to the DRAM dice and keeping DRAM die temperature within operational thresholds.
Solution Approach 2:
The patent replaces the traditional mechanical/conductive connection system (metal pillars and conductive vias) with a glass interposer system that uses embedded conductors for electrical connection while relying on the glass material's inherent thermal isolation properties to block heat transfer.
2Temperature
If glass interposer is used to separate logic die from DRAM die stack, then thermal isolation is enhanced, but signal transmission distance increases
Solution Approach 1:
The glass interposer serves as a mediator that simultaneously provides thermal isolation and electrical connectivity. By embedding conductors within the glass substrate, the patent achieves both thermal blocking and efficient signal transmission without requiring direct physical contact between the logic die and DRAM dice.
3Area of stationary object
If 3-D package configuration is used to reduce footprint, then area is reduced, but heat accumulation increases due to proximity of high-power logic die and heat-sensitive DRAM dice
Solution Approach 1:
The patent transitions from a planar 2-D arrangement to a 3-D vertical stack configuration, placing DRAM dice above the glass interposer and logic die below it. This dimensional change reduces the package footprint while the glass interposer's thermal isolation properties prevent heat accumulation by blocking vertical heat transfer paths.
Solution Approach 2:
The glass interposer acts as a thermal barrier mediator in the 3-D configuration, allowing the package to achieve compact vertical stacking while preventing heat from the logic die from transferring to the DRAM dice, thus managing heat accumulation in the compact 3-D structure.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances thermal isolation, maintaining operating temperatures within specifications for both logic and DRAM dies, ensuring operational reliability and longevity by effectively managing heat without active cooling mechanisms.
Implementation Method 1
The implementation of a glass interposer to separate the logic die from the DRAM die stack... This configuration enhances thermal isolation
Implementation Method 2
employing a dielectric molding compound and heat spreader for thermal management
Data Source
AI summary
A semiconductor device assembly, including an interposer comprising a glass material, a semiconductor die comprising a proximity coupling on a side of the interposer, and at least one other semiconductor die comprising a proximity coupling configured for communicating signals with the proximity coupling of the semiconductor die, on an opposing side of the interposer. The assembly may optionally be configured for optical signal communication with higher level packaging. Semiconductor device packages, systems and methods of operation are also disclosed.