Glass Patch EMIB Interconnects for Ultrafine Multi-Die Pitch
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Solution Overview
Problem
Current semiconductor packaging technologies face challenges in achieving ultrafine pitch interconnects between multiple dies due to limitations in bridge die bump pitches, leading to increased costs and complexities, particularly with the need for excessive silicon interposers and additional assembly steps.
Innovation Solution
The implementation of a semiconductor package with a glass patch using through glass vias (TGVs) and advanced substrate design rules, which eliminates solder-based bridge interconnects and reduces the number of bridges needed, enabling improved routing and power delivery while modulating thermal expansion to minimize stress, and combining high-density organic substrates with embedded multi-die interconnect bridges (EMIBs) for solder-less connections.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If solder-based bridge interconnects are used to connect multiple dies, then electrical interconnection is achieved, but bridge die bump pitches are limited and assembly complexity increases
Solution Approach 1:
The patent extracts the solder-based bridge interconnect structure and replaces it with a glass substrate-based interconnection system. The glass substrate with TGVs eliminates the need for separate bridge dies and solder bumps, directly reducing assembly complexity while maintaining electrical interconnection functionality between multiple dies.
Solution Approach 2:
The glass substrate acts as an intermediary carrier that provides both mechanical support and electrical interconnection. Through glass vias (TGVs) embedded in the glass substrate enable direct electrical pathways between dies without requiring solder-based bridge structures, thereby simplifying the overall assembly process.
2Adaptability or versatility
If multiple extraneous bridge dies are embedded to accommodate multi-die interconnects, then interconnection capacity increases, but package substrate area and assembly time increase
Solution Approach 1:
The patent merges the functions of multiple extraneous bridge dies into a single glass substrate structure. The glass substrate integrates both mechanical support and electrical interconnection capabilities through TGVs, eliminating the need for multiple separate bridge dies and reducing assembly time while maintaining high interconnection capacity.
Solution Approach 2:
The glass substrate serves multiple functions simultaneously: it acts as a mechanical carrier for dies, provides electrical interconnection through TGVs, and enables high-density routing. This multi-functional approach replaces the need for multiple specialized bridge dies, reducing assembly complexity and time.
3Reliability
If solder-based bridge die connections are used, then electrical connectivity is established, but bump pitch scaling is limited and cost increases
Solution Approach 1:
The patent replaces expensive silicon bridge dies with a more cost-effective glass substrate. The glass substrate with TGVs provides the necessary electrical connectivity at lower material and manufacturing costs, making the overall package more economically viable while maintaining reliability.
4Manufacturing precision
If silicon interposers are used to solve pitch scaling limitations, then interconnect density improves, but reticle stitching requirements and overall cost increase
Solution Approach 1:
The patent extracts the interconnect function from traditional silicon interposers and implements it through a glass substrate with TGVs. This approach achieves fine pitch scaling without requiring large silicon interposer substrates that exceed reticle sizes, thereby eliminating the need for complex reticle stitching processes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution reduces the physical area of interconnects, lowers assembly costs, and eliminates the need for expensive silicon interposers, achieving improved bridge pitch scaling and thermal stability, thereby enhancing the efficiency and cost-effectiveness of semiconductor packaging.
Implementation Method 1
the glass patch includes a plurality of conductive pads and a plurality of TGVs, wherein the plurality of TGVs conductively couple the plurality of conductive pads
Implementation Method 2
the bridge is coupled to the glass patch with an adhesive layer
Data Source
AI summary
Embodiments include semiconductor packages and methods to form the semiconductor packages. A semiconductor package includes a bridge over a glass patch. The bridge is coupled to the glass patch with an adhesive layer. The semiconductor package also includes a high-density packaging (HDP) substrate over the bridge and the glass patch. The HDP substrate is conductively coupled to the glass patch with a plurality of through mold vias (TMVs). The semiconductor package further includes a plurality of dies over the HDP substrate, and a first encapsulation layer over the TMVs, the bridge, the adhesive layer, and the glass patch. The HDP substrate includes a plurality of conductive interconnects that conductively couple the dies to the bridge and glass patch. The bridge may be an embedded multi-die interconnect bridge (EMIB), where the EMIB is communicatively coupled to the dies, and the glass patch includes a plurality of through glass vias (TGVs).