Glass Patch EMIB Packaging for Ultrafine Multi-Die Interconnects
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing semiconductor packaging technologies face challenges in achieving high-density interconnects with ultrafine pitch due to limitations in bridge die bump pitches, leading to increased costs and complexities, particularly in multi-die architectures.
Innovation Solution
The implementation of semiconductor packages with multi-die ultrafine pitch patch architectures that combine high-density packaging substrates and embedded multi-die interconnect bridges without solder connections, utilizing glass patches with through glass vias and advanced substrate design rules.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If solder-based embedded bridge die connections are used, then interconnect density can be achieved, but bridge die bump pitches are limited and assembly complexity increases
Solution Approach 1:
The patent extracts the solder connection requirement from the bridge die attachment process, using direct bonding without solder to eliminate assembly complexity while maintaining interconnect density
Solution Approach 2:
The patent replaces expensive silicon interposers with a glass substrate that serves the same interconnect function at lower cost and without the pitch limitations of traditional approaches
2Length of moving object
If silicon interposers are used to solve pitch scaling limitations, then bridge pitch can be increased, but costs and manufacturing complexity increase significantly
Solution Approach 1:
The patent substitutes expensive silicon interposers with a lower-cost glass substrate that achieves the same pitch scaling function without the associated manufacturing complexities and costs
Solution Approach 2:
The patent changes the substrate material parameter from silicon to glass, enabling pitch scaling while reducing manufacturing cost and simplifying the fabrication process
3Adaptability or versatility
If multiple extraneous bridge dies are embedded to accommodate multi-die interconnects, then interconnect capacity increases, but substrate flatness control and assembly time increase
Solution Approach 1:
The patent merges multiple bridge die functions into a single glass substrate with integrated through-glass vias, eliminating the need for multiple separate bridge dies and reducing substrate flatness control requirements
Solution Approach 2:
The patent uses through-glass vias to create vertical interconnect pathways, adding a dimensional aspect that allows high-density interconnects without requiring multiple planar bridge die layers
Data Source
AI summary
Embodiments include semiconductor packages and methods to form the semiconductor packages. A semiconductor package includes a bridge over a glass patch. The bridge is coupled to the glass patch with an adhesive layer. The semiconductor package also includes a high-density packaging (HDP) substrate over the bridge and the glass patch. The HDP substrate is conductively coupled to the glass patch with a plurality of through mold vias (TMVs). The semiconductor package further includes a plurality of dies over the HDP substrate, and a first encapsulation layer over the TMVs, the bridge, the adhesive layer, and the glass patch. The HDP substrate includes a plurality of conductive interconnects that conductively couple the dies to the bridge and glass patch. The bridge may be an embedded multi-die interconnect bridge (EMIB), where the EMIB is communicatively coupled to the dies, and the glass patch includes a plurality of through glass vias (TGVs).