Embedded Silicon Bridge in Glass for Die-Tiling Precision

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Solution Overview

Problem

Semiconductor device miniaturization during die-tiling packaging faces challenges in managing bump-thickness variations during assembly.

Innovation Solution

The use of silicon bridges embedded in glass substrates with through-holes or recesses, combined with thermal compression bonding and redistribution layers, to mitigate warpage and enable heterogeneous die integration, miniaturization, and high performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Volume of moving object

If die-tiling packaging is used for semiconductor device miniaturization, then device size is reduced and integration is improved, but bump-thickness variations occur during assembly reducing manufacturing precision

Engineering Contradiction:
Improvedevice sizeVSAvoidbump-thickness variations
Core Design Contradiction:
Volume of moving objectVSManufacturing precision

Solution Approach 1:

An inorganic substrate is introduced as an intermediary carrier between the bumped dies and the final package. This substrate provides a stable platform that accommodates bump-thickness variations, enabling precise positioning and bonding of heterogeneous dies while maintaining manufacturing precision during the die-tiling assembly process

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The inorganic substrate undergoes warpage control through parameter optimization during fabrication and assembly processes. By adjusting substrate properties and assembly parameters, the substrate maintains dimensional stability despite variations in bump thickness, enabling precise die placement and bonding

Inventive Principle:
Principle #35Parameter changes

2Adaptability or versatility

If heterogeneous die integration is implemented, then device functionality and performance are improved, but warpage management becomes more difficult affecting manufacturing precision

Engineering Contradiction:
Improveheterogeneous die integrationVSAvoidwarpage control
Core Design Contradiction:
Adaptability or versatilityVSManufacturing precision

Solution Approach 1:

The inorganic substrate serves as a mediator that decouples the warpage issues of heterogeneous dies from the final package structure. Different types of dies can be integrated on the substrate without their individual warpage characteristics directly affecting the overall package, as the substrate absorbs and manages these variations

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The use of inorganic substrate materials with specific mechanical and thermal properties creates a composite structure that manages warpage from heterogeneous dies. The substrate material composition is optimized to provide dimensional stability while accommodating the integration of different die types with varying thermal and mechanical characteristics

Inventive Principle:
Principle #40Composite materials

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach effectively manages bump-thickness variations, enabling miniaturization and high-performance semiconductor devices with improved yield and heterogeneous die integration.

Implementation Method 1

The glass substrates provide warpage mitigation

Methodology Applied
Scientific EffectWarpage mitigation:

Implementation Method 2

placed on a dimensionally stable glass carrier with a temporary release layer followed by a redistribution layer (RDL) build-up that includes a photo imageable solder resist near die level. At least two dice are coupled to the silicon bridge using thermal compression bonding techniques

Methodology Applied
Scientific EffectThermal compression bonding:

Data Source

PatentEP3716320B1Inorganic-based embedded-die layers for modular semiconductive devices
Publication Date: 2025.07.23 INTEL CORP
  • EP3716320B1 patent drawingFigure 1
  • EP3716320B1 patent drawingFigure 1A~1C
  • EP3716320B1 patent drawingFigure 1D~1E

AI summary

A glass substrate houses an embedded multi-die interconnect bridge that is part of a semiconductor device package. Through-glass vias communicate to a surface for mounting on a semiconductor package substrate.