Glass Packaging Substrate Cavity Structure for High-Speed Signal Routing
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current semiconductor packaging technologies face challenges in efficiently mounting high-performance and high-frequency semiconductor elements due to high resistance and dielectric constants in ceramic substrates, and limitations in reducing wiring pitches in resin substrates.
Innovation Solution
A packaging substrate with a cavity structure is developed using a glass substrate, featuring a core layer with core vias and a distribution layer that connects conductive layers on both surfaces, along with an upper layer that connects semiconductor elements externally, and includes a cavity unit with a supporting unit for precise element positioning.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If a ceramic substrate is used for packaging, then the structural strength and stability are improved, but the resistance and dielectric constant increase, deteriorating the electrical performance for high-frequency semiconductor elements
Solution Approach 1:
The patent employs a composite substrate structure combining ceramic layers with low-dielectric constant resin layers. The ceramic substrate provides mechanical strength while the resin layers reduce the overall dielectric constant and resistance, enabling high-frequency signal transmission. This composite approach resolves the contradiction by integrating materials with complementary properties.
2Reliability
If a resin substrate is used for packaging, then the electrical performance for high-frequency elements is improved, but the capability to reduce wiring pitches is limited
Solution Approach 1:
The substrate is segmented into multiple layers including ceramic layers and resin layers with different functions. The resin layers enable fine wiring pitches and high-frequency performance, while the ceramic layers provide structural support. This segmentation allows independent optimization of each layer for its specific function, resolving the wiring pitch limitation.
3Volume of moving object
If the packaging substrate thickness is reduced to improve integration, then the device size is decreased, but the heat dissipation capability and structural stability may be compromised
Solution Approach 1:
The patent applies local quality by positioning heat-emitting elements and heat dissipation structures at specific locations within the substrate. High-thermal-conductivity materials are placed in heat-generating regions, while the overall substrate thickness is optimized for compactness. This localized approach enables effective heat dissipation without increasing overall device size.
Data Source
Figure 1~2
Figure 3(a)~3(b)
Figure 4(a)~4(b)
AI summary
The embodiment relates to a packaging substrate and a semiconductor device, comprising an element unit comprising a semiconductor element; and a packaging substrate electrically connected to the element unit; and it applies a glass substrate as a core of the packaging substrate, thereby can significantly improve electrical properties such as a signal transmission rate by connecting the semiconductor element and a motherboard to be closer to each other so that electrical signals are transmitted through as short a path as possible. Therefore, it can significantly improve electrical properties such a signal transmission rate, substantially prevent generating of parasitic element, and simplify a process of treatment for an insulating layer, and thus provides a packaging substrate applicable to a high-speed circuit.