Glass-Substrate 2.5D/3D Packaging for Lower-Cost Die Interconnects

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Solution Overview

Problem

The challenge in semiconductor packaging is to develop fully-integrated 2.5D/3D IC packages while keeping packaging costs low, as existing methods like EMIB structures require complex manufacturing processes and high costs due to embedding silicon bridges into organic substrates.

Innovation Solution

A method involving a metal array over a wafer, fixing dies to the array, forming cavities and metal pillars in a glass substrate, and connecting solder pads to the dies and organic substrate, which avoids direct embedding of the silicon bridge into the organic substrate, reducing production complexity and cost.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If silicon bridge embedding into organic substrate is used (EMIB structure), then electrical interconnection between dies is achieved, but manufacturing complexity and cost increase significantly

Engineering Contradiction:
Improveelectrical interconnectionVSAvoidmanufacturing process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent introduces a glass substrate as an intermediary carrier between the dies and the organic substrate. The glass substrate receives the dies through wafer-level processing, forms metal pillars and solder pads for electrical interconnection, and then transfers the assembled die array to the organic substrate. This intermediary approach separates the complex interconnection formation from the final packaging step, reducing overall manufacturing complexity while maintaining reliable electrical connections.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If silicon bridge embedding into organic substrate is used (EMIB structure), then electrical interconnection between dies is achieved, but packaging cost increases

Engineering Contradiction:
Improveelectrical interconnectionVSAvoidpackaging cost
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent performs die attachment, metal pillar formation, and solder pad creation on the glass substrate in advance, before final integration with the organic substrate. By completing these complex steps at the wafer level on a reusable glass carrier, the process avoids repeated handling and rework that would increase costs. The glass substrate serves as a temporary platform that enables efficient preliminary processing.

Inventive Principle:
Principle #10Preliminary action

3Device complexity

If direct die assembly onto organic substrate is used, then packaging structure is simplified, but manufacturing precision and interconnection quality deteriorate

Engineering Contradiction:
Improvepackaging structureVSAvoidinterconnection quality
Core Design Contradiction:
Device complexityVSManufacturing precision

Solution Approach 1:

The glass substrate acts as an intermediary that provides a stable, precisely controllable platform for forming metal pillars and solder pads. This intermediary allows for high-precision wafer-level processing of interconnections before final transfer to the organic substrate, ensuring high manufacturing precision while the overall packaging structure remains relatively simple.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS20230335478A12.5d/3d electronic packaging structure and method for manufacturing same
Publication Date: 2023.10.19 SJ SEMICONDUCTOR (JIANGYIN) CORP
  • US20230335478A1 patent drawing
  • US20230335478A1 patent drawing
  • US20230335478A1 patent drawing

AI summary

A 2.5D/3D electronic packaging structure and a method for manufacturing it are disclosed. The method includes: disposing a metal array over a wafer, fixing a first die and a second die to the metal array; removing a portion of the wafer to expose bottom surfaces of the first die and the second die; providing a glass substrate, forming a cavity on the surface of the glass substrate; forming vias through the glass substrate, filling the vias with metal materials to form metal pillars; forming first solder pads each at a first end of one of the metal pillars, and forming second solder pads each at a second end of that metal pillar; embedding the wafer in the cavity, and connecting the first solder pads to the first die and the second die, and connecting the second solder pads to an organic substrate.