Glass Wiring Substrate MIM Capacitor With Sawtooth Electrode Adhesion

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Solution Overview

Problem

In multilayer wiring substrates with MIM capacitors, the thin seed layers used for forming electrodes can lead to side etching during removal, resulting in weak adhesion between the dielectric layer and the bottom electrode, and subsequent peeling between the capacitor and the insulating layer.

Innovation Solution

A wiring substrate design featuring a capacitor with a contact portion on the electrode that has a sawtooth-shaped outer circumference, ensuring sufficient adhesion by embedding the insulating layer in the side-etched areas, and a manufacturing method that includes etching the electrode surface to create roughness and control the side etching amount to prevent voids and enhance resin filling.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If thin seed layers are used for forming electrodes in MIM capacitors, then the manufacturing process is simplified and material usage is reduced, but side etching occurs during seed layer removal, causing weak adhesion between the dielectric layer and bottom electrode

Engineering Contradiction:
Improveseed layer thicknessVSAvoidadhesion between dielectric layer and bottom electrode
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

A protrusion is formed on the bottom electrode before the dielectric layer is deposited. This preliminary structural feature ensures that the insulating layer can properly cover the capacitor structure even when side etching occurs during seed layer removal, preventing adhesion failures and peeling issues.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The invention accepts that side etching will occur during seed layer removal and designs the bottom electrode with a protrusion that accommodates this harmful effect. The protrusion ensures the insulating layer can still reach and adhere to the bottom electrode surface, converting the harmful side etching into a manageable condition that doesn't compromise adhesion.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

2Ease of manufacture

If side etching occurs during seed layer removal, then the manufacturing process is simplified, but the insulating layer cannot properly cover the contact area between dielectric layer and bottom electrode, causing peeling

Engineering Contradiction:
Improveseed layer removal processVSAvoidcoverage of insulating layer
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The protrusion is formed on the bottom electrode before dielectric layer deposition and insulating layer formation. This preliminary structure ensures that even when side etching occurs during simplified seed layer removal, the insulating layer has a proper contact area to adhere to, preventing peeling while maintaining manufacturing simplicity.

Inventive Principle:
Principle #10Preliminary action

3Manufacturing precision

If the outer circumference of the contact portion is made smooth, then manufacturing precision is improved, but adhesion between the capacitor and insulating layer is weakened

Engineering Contradiction:
Improvecontact portion geometryVSAvoidadhesion between capacitor and insulating layer
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The contact portion of the bottom electrode is designed with a specific local geometry featuring a protrusion that extends beyond the dielectric layer boundary. This local structural feature provides enhanced adhesion area for the insulating layer while maintaining overall manufacturing precision in other critical dimensions.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design ensures strong adhesion between the capacitor and the insulating layer, preventing peeling and maintaining the integrity of the dielectric layer, even under thermal stress.

Implementation Method 1

a third face of the first electrode that faces a second face of the dielectric layer includes a contact portion that is in contact with the second face of the dielectric layer

Methodology Applied
Scientific EffectEtching:

Implementation Method 2

an outer circumference of the contact portion has a sawtooth shape

Methodology Applied
Scientific EffectSurface area enhancement through geometric shaping: Geometry

Implementation Method 3

embedding the insulating layer in the side-etched areas

Methodology Applied
Scientific EffectMechanical interlocking:

Data Source

PatentUS20240421059A1Wiring substrate and manufacturing method of wiring substrate
Publication Date: 2024.12.19 TOPPAN HOLDINGS INC
  • US20240421059A1 patent drawing
  • US20240421059A1 patent drawing
  • US20240421059A1 patent drawing

AI summary

A wiring substrate includes: a glass substrate including a first face; a capacitor including a first electrode provided above the first face of the glass substrate, a dielectric layer provided above the first electrode, and a second electrode provided above the dielectric layer; and a first insulating layer covering the first face of the glass substrate and the capacitor. A third face of the first electrode that faces a second face of the dielectric layer includes a contact portion that is in contact with the second face of the dielectric layer, and a non-contact portion that is not in contact with the second face of the dielectric layer. An outer circumference of the contact portion has a sawtooth shape.