Glass Substrate Semiconductor Package for Warpage Control
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Solution Overview
Problem
The integration of semiconductor devices with smaller patterns and reduced substrate size poses challenges in minimizing damage and warpage during the manufacturing process.
Innovation Solution
A semiconductor package design incorporating a glass substrate with through-vias, upper and lower redistribution structures, and an interconnection chip, utilizing materials with varying thermal expansion coefficients to mitigate warpage and enhance connectivity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the substrate size is reduced to accommodate smaller pattern integration, then the integration density is improved, but the substrate becomes more susceptible to damage and warpage during manufacturing
Solution Approach 1:
The patent employs a composite substrate structure combining a glass substrate with a metal layer (such as copper or aluminum). This composite construction leverages the dimensional stability of glass while incorporating the thermal conductivity and mechanical strength of metal, thereby reducing warpage and damage susceptibility during manufacturing processes while maintaining high integration density
Solution Approach 2:
The patent modifies substrate parameters by controlling the thickness of the glass substrate and the metal layer, as well as adjusting the coefficient of thermal expansion through material selection and layer configuration. These parameter changes enable the substrate to maintain structural integrity and resist warpage under thermal and mechanical stresses during manufacturing
2Shape
If the substrate thickness is reduced to minimize warpage, then the warpage is decreased, but the mechanical strength and damage resistance are compromised
Solution Approach 1:
The patent uses a composite structure of glass substrate and metal layer where the metal layer provides enhanced mechanical strength and flexibility. This allows the overall substrate thickness to be reduced for minimizing warpage while the metal reinforcement maintains sufficient strength and damage resistance
Solution Approach 2:
The patent applies local quality by strategically positioning the metal layer within the substrate structure and varying its thickness in different regions. The metal layer is concentrated in areas requiring enhanced strength while allowing thinner glass regions in areas where warpage control is prioritized, achieving an optimized balance between warpage reduction and strength maintenance
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design reduces warpage and simplifies manufacturing processes while maintaining electrical connectivity, thereby improving the reliability and efficiency of semiconductor packages.
Implementation Method 1
utilizing materials with varying thermal expansion coefficients to mitigate warpage
Implementation Method 2
an adhesive layer between the interposer structure and the interconnection chip
Data Source
AI summary
A semiconductor package includes a glass substrate including a glass core and through-vias, an upper redistribution structure including a plurality of upper redistribution layers disposed on the glass substrate and electrically connected to the through-vias, a first chip structure and a second chip structure disposed on the upper redistribution structure and electrically connected to the upper redistribution structure, an encapsulant at least partially covering the first chip structure and the second chip structure, a lower redistribution structure disposed below the glass substrate and including at least one lower redistribution layer electrically connected to the through-vias, and an interconnection chip disposed below the lower redistribution structure and electrically connecting the first chip structure to the second chip structure.