GLDD Gate Structure With BEI Intrusions for Breakdown Voltage Control

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Solution Overview

Problem

As integrated-circuit miniaturization progresses, the breakdown voltage (BV) of semiconductor devices decreases, leading to reduced scalability and increased punch-through current, which affects the performance of high-voltage NMOS and PMOS devices.

Innovation Solution

The implementation of breakdown-enhancement implant (BEI) intrusions within gated, lightly doped drain (GLDD) structures, which are spaced apart from the channel and doped differently than the surrounding regions, adjusts the breakdown voltage and reduces punch-through current by altering the peak electrical field distributions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Volume of moving object

If integrated-circuit miniaturization is pursued to reduce device dimensions, then device density and integration are improved, but breakdown voltage decreases and punch-through current increases

Engineering Contradiction:
Improvedevice dimensionsVSAvoidbreakdown voltage
Core Design Contradiction:
Volume of moving objectVSReliability

Solution Approach 1:

The patent introduces a lightly doped drain (LDD) region with a specific doping concentration that differs from both the channel and source/drain regions. This creates a gradual doping profile that locally modifies the electric field distribution, allowing the device to maintain high breakdown voltage despite miniaturization. The LDD region acts as a transition zone that preserves reliable operation at reduced dimensions.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent modifies the doping concentration parameter by introducing the LDD region with an intermediate doping level between the heavily doped source/drain and the channel. This parameter change in the doping profile allows the device to sustain higher breakdown voltages at miniaturized geometries by reducing peak electric fields in critical regions.

Inventive Principle:
Principle #35Parameter changes

2Volume of moving object

If integrated-circuit miniaturization is pursued to reduce device dimensions, then device density and integration are improved, but punch-through current increases

Engineering Contradiction:
Improvedevice dimensionsVSAvoidpunch-through current
Core Design Contradiction:
Volume of moving objectVSObject-generated harmful factors

Solution Approach 1:

The LDD region creates a localized modification in the doping profile that specifically addresses the punch-through problem. By having a lighter doping concentration in the drain region compared to the source, the electric field is redistributed to reduce peak fields at the drain junction, thereby suppressing punch-through current while allowing channel length reduction.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent converts the potentially harmful high electric fields that cause punch-through into a beneficial gradual field distribution. The LDD region transforms the sharp field peaks that occur in conventional structures into a more distributed field profile, turning what would be a harmful concentration of electric field into a beneficial spreading out that reduces punch-through.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

3Length of moving object

If gate length is reduced for miniaturization, then device scaling is achieved, but breakdown voltage control becomes difficult

Engineering Contradiction:
Improvegate lengthVSAvoidbreakdown voltage control
Core Design Contradiction:
Length of moving objectVSManufacturing precision

Solution Approach 1:

The patent changes the doping concentration parameter in the drain region to create the LDD structure, which provides better control over breakdown voltage at reduced gate lengths. This parameter modification in the doping profile allows for more precise control of electric field distribution, making breakdown voltage less sensitive to variations in gate length during manufacturing.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach maintains or increases breakdown voltage at miniaturized geometries, improving the scalability of high-voltage devices without degrading performance, and reduces punch-through current, thereby enhancing the reliability and efficiency of NMOS and PMOS transistors.

Implementation Method 1

breakdown-enhancement implant (BEI) intrusions within gated, lightly doped drain (GLDD) structures, which are spaced apart from the channel and doped differently than the surrounding regions, adjusts the breakdown voltage and reduces punch-through current by altering the peak electrical field distributions

Methodology Applied
Scientific EffectDoping: Dopants

Data Source

PatentUS12080756B2Altering breakdown voltages in gate devices and related methods and systems
Publication Date: 2024.09.03 MICRON TECHNOLOGY INC
  • US12080756B2 patent drawing
  • US12080756B2 patent drawing
  • US12080756B2 patent drawing

AI summary

An apparatus includes lightly doped drain regions vertically extending into a semiconductor substrate. A channel region is horizontally interposed between the lightly doped drain regions, and source/drain regions vertically extend into the lightly doped drain regions. Breakdown-enhancement implant intrusion regions are within the lightly doped drain regions and are horizontally interposed between the channel region and the source/drain regions. The breakdown enhancement implant regions have a different chemical species than the lightly doped drain regions and have upper boundaries vertically underlying upper boundaries of the lightly doped drain regions. The apparatus also has a gate structure vertically overlying the channel regions and it is horizontally interposed between the breakdown-enhancement implant regions. Memory devices, electronic systems, and methods of forming microelectronic devices are also described.