Glitch Debugging via Formal Analysis and Graphical Visualization
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Solution Overview
Problem
The complexity of integrated circuit designs has increased, making verification and debugging challenging, with existing formal verification tools lacking interactivity, leading to inefficiencies and difficulties in detecting and fixing glitches caused by unstable combinational loops.
Innovation Solution
A method and system for glitch debugging that includes formal glitch analysis and the generation of a graphical glitch debugger display, using an 8-value formal verification analysis to highlight logic elements associated with glitches, allowing for interactive debugging and visualization of glitch paths and waveforms.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If formal verification tools are used to verify RTL source code and design properties, then verification completeness and reliability are improved, but interactivity and debugging efficiency deteriorate
Solution Approach 1:
The formal verification process is segmented into distinct phases: initial formal proof execution, glitch detection phase, and interactive debugging phase. The glitch debugger separately handles waveform generation, glitch detection, and visualization functions, allowing each component to be optimized independently while maintaining overall verification reliability.
Solution Approach 2:
The glitch debugger acts as an intermediary tool between the formal verification engine and the designer. It receives proof failures from the formal verifier, generates annotated waveforms as intermediate representation, and presents them to the designer for interactive debugging, thus bridging the gap between automated verification and human expertise.
2Reliability
If traditional formal verification tools run in batch mode with heavy automation, then verification thoroughness is improved, but designer insight utilization and debugging efficiency deteriorate
Solution Approach 1:
The glitch debugger performs preliminary actions by automatically generating annotated waveforms and detecting glitches before the designer begins debugging. The tool pre-processes proof failures to identify potential glitch sources and prepares visualization data in advance, reducing the time the designer needs to spend on manual analysis.
Solution Approach 2:
The system implements feedback mechanisms where the glitch debugger continuously monitors verification results, detects glitches in the generated waveforms, and provides actionable insights back to the designer. The tool updates the verification state based on designer interactions and re-runs formal proofs with refined constraints, creating an iterative feedback loop that accelerates debugging while maintaining thoroughness.
3Reliability
If exhaustive simulation methods are used to verify all possible input sequences, then verification completeness is improved, but verification time and computational resources deteriorate
Solution Approach 1:
The glitch debugger extracts only the relevant portions of the design that are involved in proof failures, rather than analyzing the entire design. It isolates the specific combinational loops and logic elements that caused the verification failure, generating waveforms only for these extracted components, thus maintaining verification completeness for critical paths while reducing overall validation time.
Solution Approach 2:
The tool changes verification parameters by switching from exhaustive simulation of all possible input sequences to targeted formal analysis of specific glitch-prone paths. The glitch debugger modifies the verification scope and depth based on detected glitch locations, adjusting computational resources to focus on high-risk areas rather than uniformly analyzing the entire design space.
4Reliability
If glitches are detected in clock logic, then design reliability is improved, but design complexity and debugging difficulty increase
Solution Approach 1:
The glitch debugger uses color-coded visualization to represent different types of glitches and their severity. Detected glitches in the waveform are highlighted with distinct colors and annotations, making it easy for the designer to distinguish between critical and non-critical issues. The tool employs visual indicators such as color-coded glitch paths and annotated waveform segments to simplify the interpretation of complex glitch patterns.
Data Source
AI summary
Embodiments include herein are directed towards a system and method for glitch debugging in an electronic design. Embodiments may include receiving, using a processor, the electronic design and performing a formal glitch analysis of the electronic design to determine if one or more glitches are present in a clock logic of the electronic design. If a glitch is identified, embodiments may further include causing a generation of a graphical glitch debugger display. Embodiments may include receiving an edit to the electronic design and re-performing the formal glitch analysis of the electronic design to determine whether a glitch is present.