Glitch Detection Redundancy via Remote Processing Unit

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Solution Overview

Problem

Existing memory systems are vulnerable to glitch attacks, which can damage processing units and prevent the detection and mitigation of glitches due to their proximity to the attack source, leading to potential data corruption and security breaches.

Innovation Solution

Implementing glitch detection redundancy by using a remote processing unit to receive redundant signaling or status bits from a local glitch detector, ensuring that a glitch alarm is triggered and mitigation operations can be performed even if the local processing unit is damaged.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If a local processing unit is used to detect glitches, then the detection speed is improved, but the reliability deteriorates because the processing unit can be damaged by glitch attacks

Engineering Contradiction:
Improveglitch detection speedVSAvoidglitch detection reliability
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The system divides the glitch detection function into two separate segments: a local glitch detector close to the memory device for fast detection, and a remote processing unit for reliable alarm triggering and mitigation. This segmentation allows each component to specialize in one aspect, resolving the contradiction between speed and reliability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The local glitch detector acts as an intermediary that detects glitches locally and triggers an alarm, while the remote processing unit serves as another intermediary that receives the alarm and executes mitigation operations. This intermediary structure protects the system by distributing functions across multiple components, preventing single-point failure.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Loss of time

If the local processing unit is positioned close to the memory device for fast response, then the response time is improved, but the vulnerability to glitch attacks increases

Engineering Contradiction:
Improveresponse timeVSAvoidvulnerability to glitch attacks
Core Design Contradiction:
Loss of timeVSObject-affected harmful factors

Solution Approach 1:

The system segments the response function into two parts: local alarm triggering by the glitch detector (fast response) and remote mitigation execution by the processing unit (protected from damage). This allows the system to maintain fast response time while reducing vulnerability by separating detection from execution.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system adds a spatial dimension to the architecture by placing the processing unit remotely rather than locally. This dimensional change allows the system to achieve both fast local detection and protected remote execution, transforming a single-location vulnerability into a distributed resilient system.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Reliability

If redundant signaling is implemented from local glitch detector to remote processing unit, then the reliability of glitch detection is improved, but the device complexity increases

Engineering Contradiction:
Improveglitch detection reliabilityVSAvoidredundant signaling complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The system uses the alarm signal as an intermediary communication mechanism between the local glitch detector and remote processing unit. This simple alarm-based intermediary approach provides reliable redundant signaling without requiring complex communication protocols or multiple signal types, thus maintaining simplicity while improving reliability.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS20240412805A1Glitch detection redundancy
Publication Date: 2024.12.12 MICRON TECHNOLOGY INC
  • US20240412805A1 patent drawing
  • US20240412805A1 patent drawing
  • US20240412805A1 patent drawing

AI summary

A method can include detecting, by a glitch detector coupled via a connection matrix to a first processing unit, an indication of a glitch on a memory system. The method can include notifying, via the connection matrix, at least a second processing unit of the detected indication of the glitch. The method can include subsequent to notifying at least the second processing unit, transmitting via the at least the second processing unit a glitch confirmation signal.