Glitch Detector Using Capacitors for Short Glitch Detection
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Solution Overview
Problem
Conventional glitch detectors fail to accurately detect short power glitches and may not always output a warning signal when a power glitch occurs, leading to potential malware implantation in chips.
Innovation Solution
A glitch detector design incorporating P-type and N-type transistors for discharging paths and capacitors to reduce reset time and ensure detection of short glitches, and to guarantee a high voltage level for signal Vm after an under-voltage glitch, preventing missed alerts.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a conventional latch-type glitch detector is used, then the device complexity is low, but the measurement precision for detecting short glitches is insufficient
Solution Approach 1:
The detector is divided into multiple functional modules: a latch-type detector for basic glitch detection, capacitors coupled to nodes for voltage level maintenance, and discharging paths with controlled resistance. Each segment performs a specific function to collectively improve detection precision while managing complexity.
Solution Approach 2:
Capacitors are pre-charged to specific voltage levels before glitch occurrence. When a glitch occurs, these pre-charged capacitors maintain the voltage level at their respective nodes, ensuring that the detection circuit can accurately detect even short-duration glitches by preserving the voltage signature.
2Speed
If the reset time of the detector is reduced to detect short glitches, then the detection speed improves, but the reliability of detecting meaningful power glitches decreases
Solution Approach 1:
Different parts of the circuit have different time constants optimized for their specific functions. The discharging paths have controlled resistance values that create appropriate time constants for resetting the latch, while capacitors at critical nodes maintain voltage levels for the duration needed to detect short glitches. This localized optimization of time constants allows fast resetting without sacrificing detection reliability.
3Measurement precision
If capacitors are added to maintain voltage levels at nodes, then the detection precision for short glitches improves, but the device complexity increases
Solution Approach 1:
The capacitors serve multiple functions: they maintain voltage levels at nodes during short glitches, work in conjunction with discharging paths to control reset timing, and interact with the latch circuit to ensure proper detection. By making these components multi-functional, the design achieves improved precision without proportionally increasing complexity.
4Speed
If discharging paths with controlled resistance are implemented, then the reset time is reduced for detecting short glitches, but the device complexity increases
Solution Approach 1:
The discharging paths use controlled resistance values to adjust the discharge rate of capacitors and nodes. By changing the resistance parameter in the discharging paths, the reset time is optimized to be short enough to detect brief glitches while maintaining reliability. This parameter optimization allows speed improvement without requiring complex additional circuitry.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enables reliable detection of short glitches and ensures that no meaningful power glitches are missed, enhancing the chip's ability to prevent malware implantation by accurately triggering warning signals.
Implementation Method 1
A first electrode of the first capacitor is coupled to the supply voltage, and a second electrode of the first capacitor is coupled to the first node
Implementation Method 2
A first electrode of the second capacitor is coupled to the ground voltage, and a second electrode of the second capacitor is coupled to the second node
Implementation Method 3
The at least one first discharging path is coupled to the first node, and is configured to discharge charges of the first node. The at least one second discharging path is coupled to the first node, and is configured to discharge charges of the second node
Data Source
AI summary
The present invention provides a glitch detector including a first inverter, a second inverter, a first capacitor and a second capacitor. The first inverter is connected between a supply voltage and a ground voltage, and is configured to receive a first signal at a first node to generate a second signal to a second node. The second inverter is connected between the supply voltage and the ground voltage, and is configured to receive the second signal at the second node to generate the first signal to the first node. A first electrode of the first capacitor is coupled to the supply voltage, and a second electrode of the first capacitor is coupled to the first node. A first electrode of the second capacitor is coupled to the ground voltage, and a second electrode of the second capacitor is coupled to the second node.