Glitchless Clock Switching for Stopped Clock Inputs
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Solution Overview
Problem
Existing clock switching systems face issues with glitchless switching due to the reliance on loss-of-signal (LOS) detectors, which incur costs, introduce lag, and contribute to output clock noise and jitter, especially when dealing with frequencies below a threshold or requiring continuous system clocks.
Innovation Solution
A method and integrated circuit design that generates reset signals based on the transition of a select signal to control the switching between clock signals, using cross-coupled flip-flops and a sequencing state machine to avoid LOS detection, allowing glitchless switching without additional system clocks and threshold frequencies.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a LOS detector is used to detect stopped clocks, then the switching circuit can be freed from stuck state, but the physical area cost increases
Solution Approach 1:
The patent extracts the LOS detection functionality from a separate dedicated circuit and integrates it into the existing clock switching circuitry. The detection is performed using the same logic elements that control switching, eliminating the need for additional physical area while maintaining the ability to detect and respond to stopped clocks
Solution Approach 2:
The clock switching circuit is designed to perform multiple functions: normal clock selection, glitchless switching, and LOS detection. By making the switching circuit universal and capable of detecting stopped clocks in addition to performing switching operations, the patent eliminates the need for a separate LOS detector, thereby reducing physical area while maintaining reliability
2Reliability
If a LOS detector is used to detect stopped clocks, then the switching circuit can be freed from stuck state, but switching glitches increase due to lagging detection
Solution Approach 1:
The patent implements preliminary action by detecting the stopped clock condition and preparing the switching circuit in advance. The circuit continuously monitors clock signals and pre-conditions the switching logic so that when a clock stops, the transition can occur immediately without lag, preventing switching glitches while maintaining reliability
Solution Approach 2:
The patent uses feedback mechanisms where the clock signal status is continuously monitored and fed back to the switching control logic. This real-time feedback allows the circuit to detect stopped clocks immediately and adjust switching operations without delay, eliminating both reliability issues and switching glitches caused by lagging detection
3Reliability
If a LOS detector with threshold frequency is used, then stopped clocks can be detected, but clocks running below threshold frequency are incorrectly declared as LOS
Solution Approach 1:
The patent implements dynamic adaptation by making the detection threshold adjustable or by using multiple detection mechanisms that can adapt to different frequency ranges. The circuit can dynamically adjust its detection parameters based on the expected operating frequency range, allowing it to accurately detect stopped clocks while supporting a wide range of operating frequencies without false LOS declarations
Solution Approach 2:
The patent changes the detection parameters dynamically or provides multiple parameter sets to accommodate different frequency ranges. By adjusting detection thresholds or using frequency-agile detection mechanisms, the circuit can distinguish between slow-running valid clocks and completely stopped clocks across the full frequency range, maintaining both detection accuracy and frequency versatility
4Reliability
If a continuously running system clock is used in LOS detection circuit, then the LOS circuit can function, but output clock noise and jitter increase
Solution Approach 1:
The patent extracts the continuous clock requirement from the LOS detection functionality. By designing the detection circuit to operate asynchronously or using event-driven detection that only activates when needed, the patent eliminates the need for a continuously running system clock, thereby reducing output clock noise and jitter while maintaining full LOS detection functionality
Solution Approach 2:
Instead of continuous operation, the patent implements periodic or event-triggered detection where the LOS detection circuit activates only when clock transitions are expected or when triggered by specific events. This periodic action maintains detection functionality while minimizing the generation of noise and jitter associated with continuous clock operation
Data Source
AI summary
An integrated circuit receives a first and second clock signal and a select signal that selects one of the clock signals. A glitchless switching circuit supplies an output clock signal according to which of the first and second clocks is selected by the select signal. A reset circuit coupled to the glitchless switching circuit responds to a direction of a transition of the select signal and generates a first reset signal in response to a first direction of the transition and generates a second reset signal in response to a second direction of the transition. The reset pulses are supplied respectively to first and second paths in the glitchless switching circuit to reset the state machine formed by the first and second paths in the event one of the input clocks is absent.