Global Address Map for Adaptive Memory Expansion
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Solution Overview
Problem
Current server CPU-Accelerator systems face limitations in memory capacity due to physical constraints and mismatches between memory expansion capabilities of Host SoCs and SCM cards, leading to oversubscription or undersubscription of memory resources, which restricts the participation of industry innovators and efficient use of memory resources.
Innovation Solution
The proposed solution involves identifying and mapping memory expansion devices and home agents capable of coherently managing them, generating a global address map with windows that dynamically match the memory pools and capacities of both, allowing for optimal memory expansion and efficient resource utilization across the system, independent of physical limitations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If proprietary memory protocols are used in CPU SoCs, then memory capacity can be extended beyond physical constraints, but other industry SCM innovators cannot participate
Solution Approach 1:
The patent implements a universal address map data structure that can accommodate multiple types of memory pools (volatile and non-volatile) from different vendors through a standardized interface. The global address map uses a common format with window-based mapping that works across proprietary and industry standard protocols, allowing multiple SCM innovators to participate while maintaining extended memory capacity.
2Adaptability or versatility
If industry protocol attached SCM schemes are used, then vendor participation is enabled, but memory resources become oversubscribed or undersubscribed due to mismatches between Host expansion capabilities and SCM card capacity
Solution Approach 1:
The patent implements dynamic address map generation that adapts to the specific capabilities of the Host SoC and SCM card combination. The global address map is configured based on the actual memory expansion capabilities of the Host and the capacity of the SCM card, allowing optimal resource utilization. The window-based mapping can be dynamically adjusted to match the ratio between Host expansion capability and SCM card capacity, preventing both oversubscription and undersubscription.
Solution Approach 2:
The patent changes the parameters of the address map configuration based on the specific hardware combination. The global address map uses configurable window sizes and offsets that are adjusted according to the Host's memory expansion capability and the SCM card's capacity. This parameter adjustment ensures optimal memory resource utilization for each specific Host-SCM configuration.
3Ease of manufacture
If fixed memory controller pins are used in CPU SoCs, then manufacturing is simplified, but memory capacity is limited by die size and pin constraints
Solution Approach 1:
The patent introduces an intermediary address map data structure that sits between the fixed memory controller pins and the expandable SCM memory. This address map acts as a mediator that translates the limited physical address space available from fixed pins into a larger logical address space by mapping to external SCM memory pools. This allows the system to overcome pin and die size constraints while maintaining manufacturing simplicity.
Data Source
AI summary
An integrated circuit (IC) for adaptive memory expansion scheme is proposed, which comprises: a home agent comprising a first memory expansion pool and a second memory expansion pool; a first port connecting the home agent to a first memory expansion device, where the first memory expansion device comprises a first memory pool; a second port connecting the home agent to a second memory expansion device, where the second memory expansion device comprises a second memory pool; a first address table mapping the first memory expansion pool to the first memory pool based on a size of the first memory expansion pool or a size of the first memory pool; and a second address table mapping the second memory expansion pool to the second memory pool based on a size of the second memory expansion pool or a size of the second memory pool.