Global Bit Line Charge Sharing for Lower Inversion Current
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Solution Overview
Problem
Conventional semiconductor devices with hierarchical memory cell arrays face challenges in reducing consumption current when inverting and driving data on global bit lines, as existing charge reusing techniques are not effective for this configuration.
Innovation Solution
A semiconductor device with a configuration that includes multiple transmission lines, inverting circuits, switches, and global sense amplifiers, where adjacent transmission lines are short-circuited to share charge and then inverted by the inverting circuits, allowing for the reuse of electric charge stored in fixed capacitances to reduce consumption current.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If conventional charge reusing techniques are applied to hierarchical memory cell arrays, then consumption current can be reduced, but the techniques are not applicable to global bit line inversion and driving operations
Solution Approach 1:
The bit line structure is segmented into local bit lines and global bit lines with separate control mechanisms. The invention applies charge reusing techniques specifically to the global bit lines by controlling switches S1-S4 independently, allowing the technique to be adapted to the hierarchical configuration without requiring complete redesign of the entire bit line system.
Solution Approach 2:
Different control strategies are applied to different parts of the bit line system. Local bit lines use conventional control while global bit lines implement the charge reusing technique with specific switch configurations (S1-S4). This allows the invention to address the specific problem of global bit line inversion while maintaining compatibility with the overall hierarchical structure.
2Use of energy by moving object
If charge reusing techniques are implemented, then consumption current is reduced, but area for arranging capacitors increases
Solution Approach 1:
The transmission lines themselves serve as the charge storage medium through their inherent fixed capacitances. Instead of requiring external capacitors to store charge for reuse, the invention utilizes the capacitance already present in the transmission line structure, allowing charge reusing to occur naturally during the operation sequence without additional component area.
Solution Approach 2:
The invention changes the operational parameters of the existing transmission line capacitance by controlling the timing and state of switches S1-S4. By manipulating when the transmission lines are connected to power, ground, or each other, the system achieves charge reusing effect without changing the physical capacitance values or adding components.
3Device complexity
If single-ended structure is used for bit line and sense amplifier, then device complexity is reduced, but consumption current cannot be reduced during inversion and readout operations
Solution Approach 1:
Before the inversion and readout operations, the global bit lines are pre-charged to appropriate logic levels through the controlled operation of switches S1-S4. This preliminary charging action enables the subsequent inversion operation to reuse charge more effectively, reducing the current required during the actual data inversion while maintaining the simplicity of the single-ended structure.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively reduces consumption current during driving operations in hierarchical memory cell arrays by reusing electric charge between adjacent transmission lines, optimizing current reduction when the ratio of fixed capacitance to coupling capacitance is 4:1.
Implementation Method 1
after charge sharing of adjacent ones of the plurality transmission lines occurs by setting the plurality of the third switches into a conductive state
Data Source
AI summary
A semiconductor device comprises transmission lines, inverting circuits, first, second and third switches, global sense amplifiers, and a control circuit. The first switch switches between the transmission line and the input of the inverting circuit, the second switch switches between the transmission line and the output of the transmission line, and the third switch switches between the adjacent transmission lines. The control circuit turns off the first and second switches so that the transmission lines are brought into a floating state in a state where signals of the transmission lines are held in the inverting circuits by the global sense amplifiers. After charge sharing of the transmission lines occurs by turning on the third switches within a predetermined period, the control circuit turns off the second switches so that the transmission lines are inverted and driven via the inverting circuits and the second switches.