Global Ports for Multi-Switch Link Aggregation

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Solution Overview

Problem

Conventional multi-switch systems are limited by the spanning tree protocol, which disables links to avoid loops, rendering them inoperable if a link fails and restricting link aggregation to only two switches or a switch and an endpoint, necessitating a more robust and flexible approach for arbitrary topologies.

Innovation Solution

The implementation of global ports with configurable switching logic that maps local physical ports to global port identifiers, allowing for alternate mappings in response to link failures, and utilizing content addressable memory for efficient hashing and routing in a multi-switch system with arbitrary topologies.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Stability of the object's composition

If the spanning tree protocol is used to interconnect multiple Ethernet switches, then loops are avoided and connectivity is guaranteed, but links are disabled and system performance is not guaranteed

Engineering Contradiction:
Improveconnectivity guaranteeVSAvoidsystem performance
Core Design Contradiction:
Stability of the object's compositionVSProductivity

Solution Approach 1:

The patent implements dynamic link aggregation groups (LAGs) that can adaptively adjust their composition and membership based on real-time network conditions. Unlike static spanning tree configurations, the LAG structure allows links to be dynamically added, removed, or reconfigured without disabling entire branches, thereby maintaining both connectivity and optimal performance through continuous adaptation.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent merges multiple physical links between switches into a single logical link aggregate group (LAG), combining their bandwidth and redundancy. This merging allows all links in the LAG to remain active simultaneously for load balancing, eliminating the need to disable links as spanning tree requires, thus improving system performance while maintaining connectivity.

Inventive Principle:
Principle #5Merging (Combining)

2Power

If link aggregation is implemented between switches, then bandwidth is increased, but the spanning tree protocol disables additional links to avoid loops, limiting aggregation to only two switches or a switch and an endpoint

Engineering Contradiction:
ImprovebandwidthVSAvoidtopology flexibility
Core Design Contradiction:
PowerVSAdaptability or versatility

Solution Approach 1:

The patent creates a universal link aggregation mechanism that functions across arbitrary switch topologies, not limited to specific configurations. The LAG implementation works in mesh, ring, tree, and custom topologies, allowing link aggregation to be applied universally throughout the network regardless of the underlying structure, thereby enabling bandwidth expansion without topology constraints.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent implements dynamic LAG formation and management that automatically adapts to changing network topologies. Links can be dynamically added to or removed from LAGs based on failure detection or configuration changes, allowing the aggregation structure to evolve with the network rather than being constrained by static topology rules.

Inventive Principle:
Principle #15Dynamics

3Device complexity

If conventional static topologies like stacking rings are used, then system structure is simplified, but a failed link renders the whole system inoperable

Engineering Contradiction:
Improvesystem structureVSAvoidsystem operability
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent implements redundant link aggregation groups and alternative path configurations in advance, so that when a link fails, traffic can be immediately rerouted through pre-established alternative LAGs or paths. This beforehand cushioning ensures that no single link failure can render the system inoperable, as compensatory pathways are already in place.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

Solution Approach 2:

The patent merges multiple redundant paths into functional LAGs, combining their capacities and failover capabilities. By merging alternative routes into unified aggregation groups, the system maintains operational integrity through link failures while preserving relatively simple management interfaces.

Inventive Principle:
Principle #5Merging (Combining)

4Adaptability or versatility

If multiple switches are interconnected with arbitrary topologies, then flexibility and robustness are improved, but loop prevention and performance guarantee become difficult

Engineering Contradiction:
Improvetopology flexibilityVSAvoidloop prevention
Core Design Contradiction:
Adaptability or versatilityVSStability of the object's composition

Solution Approach 1:

The patent introduces global port identifiers as an intermediary abstraction layer between physical links and logical network functions. These global port IDs enable the system to track and manage connectivity across arbitrary topologies without directly implementing complex loop prevention algorithms, as the intermediary layer handles path identification and routing decisions.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent implements dynamic detection and management of network paths using global port identifiers, allowing the system to adapt to arbitrary topologies in real-time. The dynamic path tracking mechanism continuously monitors link states and routing paths, enabling loop prevention through active management rather than static configuration constraints.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS8098574B2Global ports in multi-switch systems
Publication Date: 2012.01.17 INTEL CORP
  • US8098574B2 patent drawing
  • US8098574B2 patent drawing
  • US8098574B2 patent drawing

AI summary

Global ports are supported in multi-switch systems having arbitrary topologies. In some implementations, global ports are implemented in a manner which makes the switch system robust in the face of link failure. In specific Ethernet implementations, global ports enable flooding, learning, forwarding, and link aggregation across the switch system.