Global Power Management for Multi-Core Processor Chips
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current power management in multi-core processor chips is typically local to each core processor, leading to inefficient power distribution and potential performance degradation, as dynamic power limitations can result in tasks taking longer and consuming more power.
Innovation Solution
A global power management approach is implemented, where a central controller accumulates power estimates from multiple core processors and coprocessor blocks to determine a global power threshold, adjusting master clock frequencies and instructing core processors to control their power consumption based on this threshold.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If local power management is performed at each core processor, then each core can independently control its power consumption, but overall chip power efficiency deteriorates and performance degrades
Solution Approach 1:
The patent merges individual core power management into a unified global power management system. The power management controller aggregates power consumption data from multiple cores and coprocessors, determines a global power threshold, and coordinates power distribution across the entire chip to optimize overall performance while maintaining thermal safety.
Solution Approach 2:
The power management controller serves multiple functions: it monitors power consumption at individual core level, aggregates cumulative power estimates across all cores and coprocessors, determines global power thresholds, and dynamically adjusts power distribution. This multi-functional approach resolves the contradiction by providing both granular monitoring and holistic control.
2Use of energy by stationary object
If global power threshold is enforced strictly, then overall chip power consumption is controlled, but individual core performance deteriorates due to power limitations
Solution Approach 1:
The system dynamically adjusts power distribution based on real-time conditions. The controller monitors cumulative power estimates and compares them against the global power threshold, then dynamically modifies operating parameters such as clock frequencies and voltage levels of individual cores and coprocessors. This dynamic adjustment allows the system to maintain global power control while adapting to varying workload demands and preventing performance degradation.
Solution Approach 2:
The patent changes operational parameters (clock frequency, voltage) of cores and coprocessors based on power conditions. When the global power threshold is approached or exceeded, the controller adjusts these parameters to reduce power consumption while maintaining acceptable performance levels. This parameter adjustment resolves the contradiction by balancing power constraints with performance requirements.
Data Source
AI summary
According to at least one example embodiment, a method and corresponding apparatus for controlling power in a multi-core processor chip include: accumulating, at a controller within the multi-core processor chip, one or more power estimates associated with multiple core processors within the multi-core processor chip. A global power threshold is determined based on a cumulative power estimate, the cumulative power estimate being determined based at least in part on the one or more power estimates accumulated. The controller causes power consumption at each of the core processors to be controlled based on the determined global power threshold. The controller may directly control power consumption at the core processors or may command the core processors to do so.