Global Random Area Management for Memory Write Performance

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Solution Overview

Problem

The existing data writing methods for rewritable non-volatile memory modules face delays due to the valid data merging operation for global random physical erasing units, which affects the performance of memory storage apparatuses as the capacity increases and multiple logical-to-physical address mapping tables are used.

Innovation Solution

A data writing method that selects a physical erasing unit from the spare area as a global random area, builds a global random area searching table to record updated information, and determines if the data dispersedness degree is below a threshold to decide whether to write updated data into the global random area, thereby reducing the need for updating logical-physical mapping tables during write commands.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If the memory storage apparatus uses multiple logical-to-physical address mapping tables to manage large capacity, then the storage capacity is increased, but the time required for updating mapping tables during valid data merging operations is increased

Engineering Contradiction:
Improvestorage capacityVSAvoidtime for updating mapping tables
Core Design Contradiction:
Quantity of substanceVSLoss of time

Solution Approach 1:

The patent segments the address mapping management by dividing physical erasing units into data area and spare area, and further designates specific physical erasing units as global random physical erasing units. This segmentation allows the system to handle large storage capacity while reducing mapping update time by confining random writes to specific segments rather than managing entire mapping tables.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces global random physical erasing units as an intermediary layer between the host system and the main data storage area. These intermediary units absorb random write operations, preventing the need to update the full logical-to-physical address mapping table for every write operation, thus reducing mapping update time while maintaining large storage capacity.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If the memory storage apparatus performs valid data merging operation for global random physical erasing units, then data integrity is improved, but the speed of executing write commands is reduced

Engineering Contradiction:
Improvedata integrityVSAvoidspeed of executing write commands
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent performs preliminary actions by pre-designating global random physical erasing units and pre-establishing their mapping relationships. This allows the system to maintain data integrity through controlled merging operations while improving write command speed, as the preliminary setup eliminates the need for complex real-time mapping updates during write operations.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent extracts the global random physical erasing units from the main data storage area, creating a separate managed zone. This extraction allows valid data merging operations to be performed on a limited subset of units rather than the entire storage system, thereby maintaining data integrity while minimizing the impact on overall write command execution speed.

Inventive Principle:
Principle #2Taking out (Extraction)

3Adaptability or versatility

If the memory storage apparatus uses global random physical erasing units for temporary data storage, then the flexibility of data management is improved, but the complexity of managing physical erasing units is increased

Engineering Contradiction:
Improveflexibility of data managementVSAvoidcomplexity of managing physical erasing units
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent applies universality by making global random physical erasing units serve multiple functions: they act as both temporary storage for updated data and as part of the overall data storage system. This multi-functionality improves data management flexibility while the standardized management approach keeps complexity controlled.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent applies local quality by assigning specific management characteristics to global random physical erasing units that differ from regular data area units. This localized management approach provides flexibility for handling updated data while maintaining simpler management for the majority of storage units, thereby balancing flexibility and complexity.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS9058256B2Data writing method, memory controller and memory storage apparatus
Publication Date: 2015.06.16 PHISON ELECTRONICS
  • US9058256B2 patent drawing
  • US9058256B2 patent drawing
  • US9058256B2 patent drawing

AI summary

A data writing method for a rewritable non-volatile memory module is provided. The method includes selecting at least one physical erasing unit as a global random area and building a global random area searching table for recording update information corresponding to updated logical pages that data stored in the global random area belongs to. The method also includes receiving updated data belonging to a logical page; and determining whether a data dispersedness degree corresponding to the global random area is smaller than a data dispersedness degree threshold. The method further includes, if the data dispersedness degree corresponding to the global random area is smaller than the data dispersedness degree threshold, writing the update data into the global random area and recording update information corresponding to the logical page in the global random area searching table.