Global Shared Memory Allocation via System Calls
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Solution Overview
Problem
Multi-processor systems face scalability limitations due to bandwidth constraints in shared memory access, particularly in symmetric multi-processor (SMP) architectures, which hinder performance improvements as the system scale increases.
Innovation Solution
Implementing a global shared memory paradigm that allows multiple nodes to access a global address space through system calls for allocation and reservation, enabling efficient memory management and inter-node communication without explicit task inter-communication, using the gsm_init() and gsm_alloc() system calls to manage effective addresses and allocate backing storage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If SMP architecture with shared memory is used, then inter-processor communication is simplified, but scalability is limited due to bandwidth constraints
Solution Approach 1:
The patent segments the shared memory into per-node local memory and global shared memory regions. Each node has its own local memory for high-speed access, while a centralized global memory space is shared across all nodes. This segmentation allows nodes to maintain simple local access patterns while enabling scalable global communication through the global memory space, resolving the contradiction between communication simplicity and scalability.
Solution Approach 2:
The patent introduces a hierarchical memory dimension with local memory (L1/L2 caches) and global shared memory (system memory). This dimensional separation allows processors to access data at different levels: fast local access for frequently used data and slower but scalable global access for distributed data. The hierarchical structure enables both simple local communication and scalable global communication simultaneously.
2Quantity of substance
If virtual memory is used to enlarge addressable locations, then the number of addressable storage locations increases, but address translation overhead is introduced
Solution Approach 1:
The patent introduces a memory management unit (MMU) as an intermediary between the processor and physical memory. The MMU handles virtual-to-physical address translation automatically, allowing processes to use large virtual address spaces without manual intervention. This intermediary component abstracts the complexity of address translation from the application level, enabling large addressable spaces while maintaining simple programming models.
Solution Approach 2:
The MMU performs address translation autonomously during memory accesses without requiring software intervention. The hardware-based translation mechanism self-manages the mapping between virtual and physical addresses, reducing the burden on software and eliminating the need for complex address translation algorithms in user programs. This self-service approach enables large virtual address spaces with minimal overhead.
3Reliability
If coherency protocols are employed to maintain common memory view, then data correctness is ensured, but bandwidth consumption increases
Solution Approach 1:
The patent implements different memory access qualities for different memory regions: local memory provides high-speed, coherent access for frequently accessed data, while global shared memory provides scalable but less frequent access. The system automatically optimizes data placement and access patterns to minimize coherency protocol invocations, ensuring data correctness where needed while reducing bandwidth consumption for global accesses. This local quality differentiation resolves the contradiction between reliability and energy efficiency.
Data Source
AI summary
A method of operating a data processing system includes each of multiple tasks within a parallel job executing on multiple nodes of the data processing system issuing a system call to request allocation of backing storage in physical memory for global shared memory accessible to all of the multiple tasks within the parallel job, where the global shared memory is in a global address space defined by a range of effective addresses. Each task among the multiple tasks receives an indication that the allocation requested by the system call was successful only if the global address space for that task was previously reserved and backing storage for the global shared memory has not already been allocated.