Global Shutter Readout Timing for Low-Noise Voltage Sampling

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Solution Overview

Problem

Conventional global shutter readout circuits in image sensors face challenges in reducing noise and improving shading performance due to coupling mismatches and variability in bitline voltages across the pixel array, leading to suboptimal image acquisition.

Innovation Solution

The implementation of a voltage domain global shutter readout circuit with improved timing, where the pixel enable transistor is turned OFF before the sample and hold reset or signal transistors, allowing for precise sampling at the floating diffusion without coupling mismatch, and employing slope control to reduce variability in black and signal levels across the pixel array.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the pixel enable transistor is turned OFF simultaneously with or after the sample and hold transistors, then the readout process is simpler, but coupling mismatches occur causing fixed pattern noise and poor shading performance

Engineering Contradiction:
Improveshading performanceVSAvoidtiming control complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The pixel enable transistor is turned OFF in advance before the sample and hold transistors are turned OFF. This preliminary action ensures that the bitline is properly discharged and coupling mismatches are eliminated before sampling occurs, thereby improving shading performance and reducing fixed pattern noise without significantly increasing timing control complexity

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

By turning OFF the pixel enable transistor beforehand, the circuit prepares the bitline in a controlled state before the critical sampling operation. This beforehand cushioning prevents coupling mismatches from occurring in the first place, cushioning against the development of fixed pattern noise and shading artifacts

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

2Measurement precision

If conventional simultaneous switching is used, then the circuit operation is simpler, but bitline voltage variability causes noise and inconsistent image quality

Engineering Contradiction:
Improvevoltage sampling accuracyVSAvoidreadout timing sequence
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The pixel enable transistor is switched OFF in advance of the sample and hold transistors to establish a stable bitline voltage baseline before sampling. This preliminary action eliminates voltage variability and coupling mismatches, improving voltage sampling accuracy while the extended timing sequence manages the time loss through optimized phasing

Inventive Principle:
Principle #10Preliminary action

3Reliability

If the pixel enable transistor remains ON during sampling, then charge transfer is maintained, but coupling mismatches degrade image quality

Engineering Contradiction:
Improveimage quality consistencyVSAvoidtransistor control simplicity
Core Design Contradiction:
ReliabilityVSEase of operation

Solution Approach 1:

The pixel enable transistor is turned OFF preliminarily before the sample and hold transistors to eliminate coupling mismatches that would otherwise degrade image quality. This preliminary switching action ensures consistent image quality across the pixel array while the control sequence manages the operational complexity through systematic timing

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS11750950B1Voltage domain global shutter readout circuit timing
Publication Date: 2023.09.05 OMNIVISION TECHNOLOGIES INC
  • US11750950B1 patent drawing
  • US11750950B1 patent drawing
  • US11750950B1 patent drawing

AI summary

A global shutter readout circuit includes a pixel enable signal and a first sample and hold (SH) signal that are configured to turn ON a pixel enable transistor and a first storage transistor at a first time during a global transfer period. The pixel enable signal is configured to begin a transition to an OFF level at a second time and complete the transition to the OFF level at a third time to turn OFF the pixel enable transistor. The first SH signal is configured to begin a transition to the OFF level at a fourth time, which occurs after the second and third times, and complete the transition to the OFF level at a fifth time to turn OFF the first storage transistor. An OFF transition duration between the fourth and fifth times is greater than an ON transition duration of the first SH signal at the first time.