Global Shutter Image Sensor Parasitic Charge Correction

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Solution Overview

Problem

Global shutter image sensors face challenges in maintaining small dimensions while effectively reducing or eliminating the influence of parasitic charges on the output signal, which can alter image quality.

Innovation Solution

The design incorporates a back-side illuminated image sensor with a photosensitive area of a first conductivity type, a memory area with a higher doping level, a read area, and a transfer area, along with a control circuit to manage charge transfer between these areas, including a duplication of transistors to correct for parasitic charges, ensuring accurate signal output.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a memory cell and additional transistor are added to achieve global shutter functionality, then the ability to store complete images without time shifts is improved, but the pixel dimensions increase

Engineering Contradiction:
Improveimage accuracyVSAvoidpixel dimension
Core Design Contradiction:
ReliabilityVSLength of moving object

Solution Approach 1:

The patent merges the memory cell and transfer transistor functions into a shared structure with the photodiode and read circuit. The memory cell is integrated such that it shares physical space and structural elements with other pixel components, allowing global shutter functionality without proportionally increasing pixel area.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent utilizes vertical stacking and three-dimensional integration to accommodate the additional memory cell and transistor components. By extending structures in the vertical dimension rather than only lateral expansion, the pixel can maintain its planar footprint while incorporating global shutter elements.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Measurement precision

If parasitic charge correction mechanisms are implemented, then the output signal accuracy is improved, but the device complexity increases

Engineering Contradiction:
Improveoutput signal accuracyVSAvoidcircuit complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent implements a duplicate or copy of the transfer transistor specifically for parasitic charge correction purposes. This additional transistor mirrors the function of the main transfer transistor but operates independently to measure and correct parasitic charges, enabling accurate signal correction without requiring complex control logic.

Inventive Principle:
Principle #26Copying

Solution Approach 2:

The patent introduces an intermediate correction mechanism that acts as a mediator between the photodiode and read circuit. The additional transistor serves as an intermediary element that isolates and measures parasitic charges separately, allowing their effects to be corrected without directly complicating the main signal path.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach allows for the maintenance of small pixel dimensions while significantly reducing the impact of parasitic charges on the output signal, resulting in improved image quality by accurately isolating and correcting for thermal noise and parasitic charge influences.

Implementation Method 1

A photodiode D is connected to a sense node S by a transfer transistor T1

Methodology Applied
Scientific EffectPhotoelectric effect: Photoelectric Effect

Data Source

PatentUS10531022B2Image sensor of global shutter type
Publication Date: 2020.01.07 STMICROELECTRONICS (CROLLES 2) SAS
  • US10531022B2 patent drawing
  • US10531022B2 patent drawing
  • US10531022B2 patent drawing

AI summary

Each pixel of a global shutter back-side illuminated image sensor includes a photosensitive area. On a front surface, a first transistor includes a vertical ring-shaped electrode penetrating into the photosensitive area and laterally delimiting a memory area. The memory area penetrates into the photosensitive area less deeply than the insulated vertical ring-shaped electrode. A read area is formed in an intermediate area which is formed in the memory area. The memory area, the intermediate area and read area define a second transistor having an insulated horizontal electrode forming a gate of the second transistor. The memory area may be formed by a first and second memory areas and an output signal is generated indicative of a difference between charge stored in the first memory area and charge stored in the second memory area after a charge transfer to the first memory area.