Global Time Stamping Module for Complex Timing Measurements
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Solution Overview
Problem
Current automatic test equipment (ATE) faces challenges in measuring complex timing relationships between signals on different pins of a Device Under Test (DUT), particularly for mixed signal devices, leading to reduced test throughput and increased costs due to non-deterministic and loosely related time measurements.
Innovation Solution
The implementation of a distributed time measurement system using a Global Time Stamping Module with multiple Global Time Stamping Cores, which receives clock and synchronization information to synchronize data acquisition across multiple cores, allowing for parallel time stamp recording and calculation of relative timing results, thereby reducing test time and simplifying load board design.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a distributed time measurement system with multiple Global Time Stamping Cores is implemented, then measurement precision and test throughput are improved, but device complexity increases
Solution Approach 1:
The system divides the time measurement functionality into multiple independent Global Time Stamping Cores (GTSC), each capable of autonomous time stamping operations. Each GTSC is assigned to specific pins or signal groups, allowing parallel time measurements across different pins simultaneously. This segmentation enables high-precision complex timing relationship measurements while distributing the computational load, thereby improving measurement precision without proportionally increasing overall system complexity.
Solution Approach 2:
Each Global Time Stamping Core is designed as a universal module that can handle multiple functions: receiving clock information, processing synchronization information, detecting events on assigned pins, and generating time stamps. The GTSCs can be dynamically configured for different measurement scenarios, making the system adaptable to various timing measurement requirements without requiring dedicated hardware for each function, thus improving measurement capability while controlling complexity.
2Productivity
If synchronized data acquisition across multiple cores is implemented, then productivity and test throughput are improved, but device complexity increases
Solution Approach 1:
The system introduces a Synchronization Information Register (SIR) as an intermediary mechanism between multiple GTSCs. The SIR stores synchronization control information that coordinates the operation of all GTSCs, enabling them to acquire data in a synchronized manner. This intermediary structure simplifies the synchronization process by providing a centralized control point, allowing high test throughput through parallel operations while avoiding the complexity of direct peer-to-peer synchronization between all GTSC pairs.
Solution Approach 2:
The system implements a feedback mechanism where each GTSC monitors synchronization status and adjusts its operation accordingly. The event detecting section receives feedback about pin states and synchronization conditions, allowing each GTSC to autonomously determine when to capture time stamps based on global synchronization signals. This feedback-driven approach enables coordinated parallel measurements across multiple cores, improving productivity while maintaining individual core simplicity.
Data Source
AI summary
Apparatus used in an automatic test equipment, comprising a plurality of system modules. Each system module comprises a Time Measurement Unit. The Time Measurement Unit comprises a Global Time Stamping Module. The Global Time Stamping Module comprises a plurality of Global Time Stamping Cores that comprising: an information receiving section for receiving at least two information, an event receiving section for receiving at a Core Input events, an event determining section for determining events of interest from said received events appearing on said Core Input, and an instructing section for instructing a Time Stamp Memory to record a current status of a Time Stamp Counter corresponding to the Clock Information, if an event of interest is determined. The Global Time Stamping Module further comprises a supplying section for supplying said plurality of Global Time Stamping Cores with a common time base.