Capacitance Multiplier Topology for Low-Voltage Noise Decoupling
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Solution Overview
Problem
Conventional capacitance multiplier circuits are unsuitable for low voltage applications due to voltage drop, require high impedance, and consume large amounts of power, making them inefficient for providing effective noise suppression in integrated circuits.
Innovation Solution
The implementation of a capacitance multiplier circuitry that includes a capacitor, an adjustable resistance, and a transconductance circuit, allowing for a large adjustable capacitance without voltage drop and low power consumption, using a transistor with source-drain terminals coupled to power and ground lines, and optional resistors and electrical components to enhance capacitance multiplication.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional capacitance multiplier circuits are used to provide large capacitance values, then noise suppression is improved, but voltage drop occurs making them unsuitable for low voltage applications
Solution Approach 1:
The patent changes the operating parameters of the capacitance multiplier circuit by using a transconductance circuit with high gain to achieve large capacitance multiplication (greater than 100x) without the traditional voltage drop. The circuit operates in a regime where the transconductance parameter dominates, allowing low-voltage operation while maintaining noise suppression effectiveness.
2Reliability
If conventional capacitance multiplier circuits are used to provide large capacitance values, then noise suppression is improved, but power consumption increases
Solution Approach 1:
The patent optimizes the power consumption parameter by designing a transconductance circuit that achieves high capacitance multiplication with minimal current draw. The circuit uses high-impedance nodes and carefully selected transistor dimensions to minimize static power consumption while maintaining the ability to suppress power supply noise effectively.
3Reliability
If conventional capacitance multiplier circuits are used, then fixed capacitance values are provided, but adaptability to different impedance requirements is reduced
Solution Approach 1:
The patent introduces dynamic adaptability by making the capacitance multiplier circuit's output impedance controllable through the transconductance parameter. The circuit can adapt to different load impedance requirements by adjusting the transconductance gain, allowing it to interface with various circuit configurations while maintaining its noise suppression function.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration provides a capacitance value greater than a hundred times the original capacitor value, effectively suppressing power supply noise without increasing circuit area or power consumption, enabling its use in low voltage systems.
Implementation Method 1
a capacitor having a first terminal coupled to the power supply line and having a second terminal
Implementation Method 2
a transconductance circuit coupled to the capacitor and the adjustable resistance. The transconductance circuit can include a current source coupled between the second source-drain terminal of the transistor and the ground line
Implementation Method 3
an adjustable resistance having a first terminal coupled to the second terminal of the capacitor and having a second terminal. The capacitance multiplier circuitry has a capacitance value that can be elevated by increasing a resistance value of the adjustable resistance
Data Source
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AI summary
An integrated circuit may include one or more circuits coupled to capacitance multiplier circuitry. The capacitance multiplier circuitry may include a capacitor, fixed and tunable resistances, and a transconductance circuit. The tunable resistance can be adjusted to control the overall capacitance of the capacitance multiplier circuitry. The transconductance circuit may include a transistor having a drain terminal coupled to a first electrical component and a source terminal coupled to a second electrical component. The first electrical component may be a diode-connected transistor, a direct shorting wire, a resistor, an inductor, or a current source. The second electrical component may be a current source, a direct shorting wire, a resistor, an inductor, or another diode-connected device. Configured in this way, the capacitance multiplier circuitry can provide a large adjustable amount of capacitance without a voltage drop and without consuming a large amount of power.