GNSS Receiver Channel Clock Division for Power Reduction
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Solution Overview
Problem
Conventional GNSS receivers face challenges in efficiently processing satellite navigation signals from different systems at varying clock rates, leading to inefficiencies and increased power consumption due to the need for all channels to operate on the same channel frequency, which does not adapt to the spectrum width of the RF-paths.
Innovation Solution
The proposed system introduces a method where the clock rate is reduced by a factor of 2N, depending on the widest bandwidth, allowing channels to operate on divided clocks, and includes a Signal Preparation Module after the ADC to process signals efficiently, enabling channels to select their clock division coefficient based on the spectrum width, thereby reducing power consumption and improving processing efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by stationary object
If all channels operate on the same channel frequency, then system simplicity is maintained, but power consumption increases and processing efficiency decreases
Solution Approach 1:
The patent divides the channel operations into multiple segments, each operating at different clock rates based on their specific bandwidth requirements. Channels are segmented into groups that can independently select their clock division coefficients, allowing each segment to operate efficiently at its optimal clock rate rather than forcing all channels to use a uniform high clock rate.
Solution Approach 2:
The system implements dynamic clock rate adjustment where channels can dynamically select their clock division coefficient based on their current operational requirements. The channel frequency is made variable rather than fixed, allowing it to adapt to different spectrum widths and processing needs, thereby reducing power consumption when full clock rate is not required.
2Productivity
If channels operate on divided clocks based on spectrum width, then processing efficiency improves, but device complexity increases
Solution Approach 1:
The patent implements preliminary configuration where channels are pre-configured with selectable clock division coefficients based on their expected bandwidth requirements. This preliminary setup allows channels to quickly switch to appropriate clock rates without complex real-time calculations, improving processing efficiency while managing complexity through pre-established configurations.
Solution Approach 2:
The system changes the clock rate parameter dynamically for different channels based on their spectrum width requirements. By adjusting this fundamental parameter, the system optimizes processing efficiency for each channel's specific needs. The patent provides multiple discrete parameter options (different division coefficients) that can be selected based on operational conditions.
3Use of energy by stationary object
If clock rate is reduced by factor of 2N, then power consumption decreases, but adaptability to different spectrum widths must be managed
Solution Approach 1:
The patent applies local quality by allowing different channels or channel groups to have different clock division coefficients tailored to their specific bandwidth requirements. Instead of applying a uniform clock rate reduction system-wide, each local channel can select the appropriate division factor, maintaining adaptability to various spectrum widths while achieving overall power consumption reduction.
Solution Approach 2:
The system achieves universality by designing a multi-functional clock division mechanism that can serve multiple purposes: it can adapt to different spectrum widths, reduce power consumption, and maintain processing efficiency. The same clock division infrastructure supports various division coefficients (2, 4, 8, etc.) making it a universal solution for different operational scenarios.
Data Source
AI summary
A method for receiving and processing satellite navigation signals includes receiving the navigation signals; converting the navigation signals into digital signals; providing a clock signal to all channels that process the digital signals; generating frequency division signals; selecting a channel frequency division signal from the frequency division signals based on which ADC is used to convert the satellite navigation signals into digital signals; connecting the channel to the ADC; generating code frequency signal and base carrier frequency signal using a net accumulation signal; processing the digital signal in the channel to produce digital quadrature signal components of the digital signal based on the code frequency signal and the base carrier frequency signal; using a tick signal that represents 2N×clock signal as a temporary time scale for control of the channels for determining digital signal phase differences between the channels; and outputting coordinates based on the quadrature components.


