GNSS Delay-Locked Loop Fractional Interpolation With Sigma-Delta

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Solution Overview

Problem

Existing global navigation satellite system (GNSS) position estimation technologies face challenges in achieving high accuracy due to the high power and area consumption of interpolation filters, which require high precision or higher-order interpolators, leading to inefficiencies in time and position estimation.

Innovation Solution

A sigma-delta based fractional interpolation method is employed in a delay-locked loop using a correlator, code phase discriminator, first loop filter, sigma-delta modulator, and code numerically controlled oscillator to impart fractional delays, improving accuracy while minimizing power and area consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If higher precision or higher-order interpolation filters are used to improve time estimate accuracy, then measurement precision improves, but power consumption increases

Engineering Contradiction:
Improvetime estimate accuracyVSAvoidpower consumption
Core Design Contradiction:
Measurement precisionVSUse of energy by moving object

Solution Approach 1:

The patent changes the fundamental parameter of interpolation from traditional high-precision filters to a sigma-delta modulator-based approach. This transforms the problem from requiring high computational precision at each step to using a simpler modulator that achieves equivalent or superior accuracy through a different mechanism (noise shaping and oversampling), thereby reducing power consumption while maintaining time estimate accuracy

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent substitutes the traditional mechanical/computational interpolation filter system with a sigma-delta modulation system. Instead of using complex filter algorithms that require significant computational resources, the invention uses a modulator that converts the fractional delay requirement into a pulse density modulation problem, which can be solved with simpler digital logic that consumes less power

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Measurement precision

If higher precision or higher-order interpolation filters are used to improve time estimate accuracy, then measurement precision improves, but device area increases

Engineering Contradiction:
Improvetime estimate accuracyVSAvoidinterpolation filter area
Core Design Contradiction:
Measurement precisionVSArea of stationary object

Solution Approach 1:

The patent fundamentally changes the approach parameter from filter order and precision to modulation frequency and pulse density. This parameter transformation allows the system to achieve the same time estimate accuracy with a much smaller digital circuit implementation, as the sigma-delta modulator requires far fewer logic gates and memory elements compared to high-order interpolation filters

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent replaces the area-intensive interpolation filter hardware with a compact sigma-delta modulator circuit. The modulator implements fractional delay through pulse density modulation using simple digital counters and flip-flops, which occupy minimal silicon area compared to the multipliers and adders required by traditional high-precision interpolation filters

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

3Device complexity

If traditional interpolation filters are used with quantized coefficients, then device complexity is reduced, but measurement precision deteriorates

Engineering Contradiction:
Improveinterpolation filter complexityVSAvoidtime estimate accuracy
Core Design Contradiction:
Device complexityVSMeasurement precision

Solution Approach 1:

The patent converts the harmful effect of quantization (which normally degrades precision) into a beneficial noise shaping mechanism. By using sigma-delta modulation, the quantization noise is pushed to higher frequencies where it can be filtered out, allowing the system to use simple quantized coefficients while actually achieving superior time estimate accuracy compared to traditional approaches

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Solution Approach 2:

The patent employs periodic oversampling in the sigma-delta modulator, where the input signal is effectively sampled at a rate much higher than the Nyquist rate. This periodic high-rate sampling allows the simple quantized system to capture fine temporal details that would be lost in traditional single-shot quantization, thereby improving measurement precision without increasing device complexity

Inventive Principle:
Principle #19Periodic action

Data Source

PatentUS12474482B2System and method for global navigation satellite system (GNSS) position estimation
Publication Date: 2025.11.18 SIGNALCHIP INNOVATIONS
  • US12474482B2 patent drawing
  • US12474482B2 patent drawing
  • US12474482B2 patent drawing

AI summary

A global navigation satellite system (GNSS) receiver for improving accuracy of a GNSS position estimation using a sigma-delta based fractional interpolation in a delay-locked loop is provided. The GNSS receiver includes a correlator, a code phase discriminator, a first loop filter, a code numerically controlled oscillator, and a sigma-delta modulator. The correlator correlates a GNSS C/A signal received from a satellite with a locally generated GNSS C/A code by multiplying the locally generated GNSS C/A code with incoming data samples. The code phase discriminator determines a delay between the locally generated GNSS C/A code and the GNSS C/A signal received from the satellite. The first loop filter averages the delay measured by the code phase discriminator. The code numerically controlled oscillator generates the local GNSS C/A code based on a unique CA code that corresponds to the satellite. The sigma-delta modulator imparts a fractional delay to the locally generated GNSS C/A code based on an output of the first loop filter.