GNSS Receiver Pilot-Data Combining for Low-SNR Tracking

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Solution Overview

Problem

GNSS receivers face challenges due to low signal-to-noise ratio (SNR) and multipath interference, leading to degraded tracking accuracy and reduced navigation precision.

Innovation Solution

Combining carrier and code phases of incoming GNSS signals using coherent combining techniques and signal sampling to enhance the accuracy of DLL, PLL, or FLL circuits by leveraging redundant information in data and pilot signal components.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If traditional GNSS signal processing is used, then the receiver can operate with basic circuitry, but the tracking accuracy and navigation precision are degraded due to low SNR and multipath interference

Engineering Contradiction:
Improvetracking accuracyVSAvoidsignal-to-noise ratio
Core Design Contradiction:
Measurement precisionVSReliability

Solution Approach 1:

The patent combines data and pilot components of the GNSS signal through coherent integrating to improve the signal-to-noise ratio. The summing circuit merges the in-phase and quadrature components from both data and pilot signals, creating a combined signal that has enhanced SNR for more reliable tracking operations.

Inventive Principle:
Principle #5Merging (Combining)

2Measurement precision

If signal components are combined to improve SNR, then tracking sensitivity and navigation accuracy improve, but the device complexity increases due to additional circuits

Engineering Contradiction:
Improvenavigation accuracyVSAvoidreceiver circuitry
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent segments the GNSS signal processing into distinct data and pilot component processing paths. Each path handles specific signal components separately through their own correlators and integrators, then combines the processed results. This segmentation allows for manageable complexity while achieving improved navigation accuracy through coherent integration.

Inventive Principle:
Principle #1Segmentation

3Measurement precision

If carrier and code phases are combined to mitigate signal distortions, then DLL and PLL accuracy improve, but the processing complexity increases

Engineering Contradiction:
ImproveDLL accuracyVSAvoidsignal processing circuitry
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent introduces an intermediary summing circuit that combines the error signals from both data and pilot component processing paths. This intermediary element facilitates the coherent integration of carrier and code phase information without requiring direct complex interaction between all processing components, thereby improving DLL accuracy while managing processing complexity.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentEP4597170A1Tracking performance improvement by combining components of a global navigation satellite system signal
Publication Date: 2025.08.06 AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE LTD
  • EP4597170A1 patent drawingFigure 1
  • EP4597170A1 patent drawingFigure 2
  • EP4597170A1 patent drawingFigure 3

AI summary

Technical solutions improve GNSS receiver performance by combining pilot and data components of the GNSS signal to enhance the accuracy of a DLL, PLL or FLL of the receiver (120). A receiver (120) receives a GNSS signal, removes a carrier component and provides in-phase and quadrature data and pilot signals. Data circuits (240) can process the in-phase and quadrature data signals for data early and date late offsets and pilot circuits (242) can process the in-phase and quadrature pilot signals for pilot early and pilot late offsets. The data early and data late signals can be combined to provide a data error difference and pilot early and pilot late signals can be combined to provide a pilot error difference. A summing circuit (216) can combine pilot and data error differences to provide a delay lock loop, DLL, error signal.