GNSS Receiver Sampling Grid for Fast Low-Cost Positioning
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Solution Overview
Problem
GNSS receivers face challenges in processing satellite signals efficiently due to the need for significant processing power and memory storage, leading to high costs and reduced accuracy under obstructed conditions, and there is a need for a receiver that can process GNSS satellite signals quickly using inexpensive components.
Innovation Solution
A navigation receiver design utilizing a plurality of RF paths, phase-locked loops, clock dividers, analog to digital converters, signal processors, decimators, re-quantizers, and a CPU system with hardware accelerators and multi-channel navigation Direct Memory Access (DMA) to process GNSS signals efficiently, employing a quasi-asynchronous sampling frequency grid.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If GNSS signals are processed in one clock cycle using significant processing power and memory storage, then positioning accuracy is maintained, but component cost increases
Solution Approach 1:
The patent divides the signal processing into multiple clock cycles: first clock cycle performs initial correlation and generates tentative position estimates, while second clock cycle refines these estimates. This temporal segmentation allows using simpler, less expensive components by distributing processing tasks across time rather than requiring all processing to occur simultaneously in one cycle.
Solution Approach 2:
The patent performs preliminary correlation processing in the first clock cycle to generate tentative position estimates before refinement. By preparing data structures and performing initial processing ahead of time, the system reduces the computational burden on expensive components while maintaining accuracy through subsequent refinement steps.
2Productivity
If significant processing power is used to process GNSS signals quickly, then positioning speed is improved, but component cost increases
Solution Approach 1:
The patent segments processing into parallel pipelines that operate simultaneously across multiple clock cycles. Each pipeline handles specific processing tasks (correlation, refinement, validation) that can be executed with simpler components, yet the overall system achieves fast positioning through parallel execution and efficient data flow management.
Solution Approach 2:
The patent uses periodic clock cycles to systematically process different aspects of GNSS signals. The first clock cycle performs initial processing while the second clock cycle performs refinement, creating a rhythmic processing pattern that maintains high throughput without requiring excessive processing power in any single cycle.
3Productivity
If memory storage is increased to support fast signal processing, then positioning speed is improved, but component cost increases
Solution Approach 1:
The patent extracts only the essential data elements needed for positioning from the full GNSS signal stream during initial processing. By identifying and isolating critical parameters (pseudo-range, carrier phase, satellite ephemeris) in the first clock cycle and processing only these refined elements in the second clock cycle, the system reduces memory storage requirements while maintaining fast processing capability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enables fast processing of GNSS satellite signals with reduced component costs and improved accuracy, even under obstructed conditions, by optimizing signal processing and reducing power consumption.
Implementation Method 1
A phase-locked loop is configured to generate a clock signal
Implementation Method 2
Each of the plurality of navigation systems includes a plurality of analog to digital converters, each configured to receive a GNSS signal
Data Source
AI summary
A Global Navigation Satellite System (GNSS) receiver for processing GNSS satellite signals use a quasi-asynchronous sampling frequency grid to process the received signals. The GNSS receiver includes a plurality of RF paths configured to receive Global Navigation Satellite System (GNSS) signals from an antenna and transmit the GNSS signals in a frequency range for digitizing the GNSS signals. A phase-locked loop is configured to generate a clock signal and a plurality of clock dividers are configured to receive the clock signal and divide the clock signal. Each of a plurality of navigation systems receive a clock signal from one of the plurality of clock dividers.


